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phase lock loop (PLL)

Discussion in 'Electronic Basics' started by biras, Jul 11, 2005.

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  1. biras

    biras Guest

    i choosed the VCO resistor & capacitor According to the formula (
    f min= 1/(R2(C1+32pf)), f max =(1/(R1(C1+32pf)))+f min)
    my Fmin is 10KHZ and Fmax is 20KHZ.

    And i have not connected any loop filter.
    i have checked the offset frequency.

    But the output is very worst, I'm not getting the exact squrwave(VCO
    I have checked the connection, every thing is correct.

    If I connect the capacitor between the VCOout-pin and ground, then the
    output is somewhat ok.

    Warm Regards
  2. What chip are you using?
  3. biras

    biras Guest

    i am using 4046 pll chip
  4. First point. This PLL is an analog circuit with some digital parts,
    so it needs a very clean power supply. If other chips operate across
    the same supply, you may have noise from them getting into the PLL.

    Check that your VCO is programmed (by R1, R2 and C1) to operate at the
    correct range of frequency. Connect the VCO control line to the
    positive supply line and measure the frequency of the VCO output
    frequency. This should be the expected maximum frequency. Then
    connect the VCO control line to the negative supply line. The VCO
    should produce the expected minimum frequency. The output is not
    guaranteed to be precisely a 50% duty cycle square wave, but it should
    be very close.

    If these two measurements are correct, then the VCO part of the PLL is
    set up correctly, and all that remains is to choose the PLL phase
    detector and design the loop filter.
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