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Phase lock loop questions.... Really in dilemma

Discussion in 'Electronic Design' started by [email protected], May 5, 2006.

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  1. Guest

    Hi everybody

    How are you doing today!

    I have several questions related to Phase lock loop. I already
    implemented a layout for a charge pump phase lock loop. It is working
    fine. I really want to do the process variation on it for my master
    thesis and however I am stuck now....

    The first question is how to get the simulation result on DC gain. I
    know how to calculate the DC gain with analytical results (get the
    transfer function and make the s = 0). What I want to do is to vary a
    capacitor or resistor's value and get the experimental results on DC
    gain using Hspice and see if the DC gain is changing in the direction
    predicted by the analytical results. However, I do not know what to
    measure to get the DC gain with hspice. I mean I do not know what value
    I should measure to get the DC gain. I tried to give a DC reference
    signal, but that does not seem right.

    The second thing is that I want to find some analytical results giving
    the relationship between the any transistor sizing and the any loop
    characteristics. For example, the charge pump's currency is related
    to the transistor size. I think the currency is also related to the
    loop's locking time, locking range, etc. If I can get some analytical
    results on that, that will be very wonderful! Of course, the loop
    characteristic has to be some thing that I can measure from hspice
    simulation results.

    Now I just have the equation for the first order xor pll from my text
    book. That is a super simple topology and even does not have charge
    pump. I cannot use that since it is not the same as my topology and the
    topology is too simple - my advisor said.

    Could any body give me some hints on the analytical results of this
    type for a traditional phase lock loop? Any reference or any ideas?
    Thank a lot a lot if anybody can help me out.

    My email address is . If you have some
    ideas and you do not mind sharing your ideas with me, kindly please
    drop me a line. If you are in US too and you prefer talking directly,
    please leave me a number or I can give you my number.

    Thank you very much again!

    Have a nice day!
     
  2. Jim Thompson

    Jim Thompson Guest

    Sounds like you don't know enough about phase-locked loops to even
    consider doing a masters thesis.

    ...Jim Thompson
    --
    | James E.Thompson, P.E. | mens |
    | Analog Innovations, Inc. | et |
    | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
    | Phoenix, Arizona Voice:(480)460-2350 | |
    | E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
    | http://www.analog-innovations.com | 1962 |

    Make Cinco de Mayo a Day Without a Gringo
     
  3. Sure he does... Only thing you need to know to do master thesis in these
    days it what a thesis is... then you can just get everyone else to do the
    work for you. i.e, its there to measure your competence in getting everyone
    else to do the work for you. (similar to how HW is these days)

    I hope you really don't think that college is there to measure and increase
    intelligence? I think I came out stupider after my "incarceration"(and broke
    too).
     
  4. Tim Wescott

    Tim Wescott Guest

    Once you define what you mean by "DC gain" the nature of your test will
    be clear. Review the assumptions you made when you threw out all of the
    inherent nonlinearities in your PLL to make a transfer function, and see
    what "DC gain" means.

    I think your best bet to find loop characteristics would be to make a
    step change in the input frequency (or the commanded frequency if its a
    synthesizer) and look at the evolution of the output frequency as it
    settles to its new value. You'll probably have to export the results to
    a text file and do the frequency measurement in MatLab, or simulate a
    discriminator circuit with ideal components (and verify it's correctness).
    Think of a voltage-output phase detector driving an op-amp integrator.
    Now think of the action of a switched constant current source driving a
    capacitor. See any similarities?
    You _really_ need to read a good book on phase locked loops, or take a
    class if you can. "Phase Locked Loop Circuit Design" by Dan Wolaver,
    Prentice-Hall 1991 will work. Floyd Gardner's book is more widely
    known, it's probably more widely available, and it probably has the
    information you need.
    Plan on not getting very many direct responses. Newsgroup respondents
    usually like to respond to the group, in public, for the benefit of all.

    --

    Tim Wescott
    Wescott Design Services
    http://www.wescottdesign.com

    Posting from Google? See http://cfaj.freeshell.org/google/

    "Applied Control Theory for Embedded Systems" came out in April.
    See details at http://www.wescottdesign.com/actfes/actfes.html
     
  5. Jim Thompson

    Jim Thompson Guest

    Ah!! "Ignorance makes right"??

    ...Jim Thompson
    --
    | James E.Thompson, P.E. | mens |
    | Analog Innovations, Inc. | et |
    | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
    | Phoenix, Arizona Voice:(480)460-2350 | |
    | E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
    | http://www.analog-innovations.com | 1962 |

    Make Cinco de Mayo a Day Without a Gringo
     
  6. Mark

    Mark Guest

    Along the lines of what Tim was saying...

    also think about the relationship between frequency and phase....

    your control loop is using a PHASE detector...

    and a VCO is a FREQUENCY controlled device...

    what does that mean in terms of the nature of the DC GAIN?

    Mark
     
  7. Jim Thompson

    Jim Thompson Guest

    Bwahahahahaha!

    ...Jim Thompson
    --
    | James E.Thompson, P.E. | mens |
    | Analog Innovations, Inc. | et |
    | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
    | Phoenix, Arizona Voice:(480)460-2350 | |
    | E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
    | http://www.analog-innovations.com | 1962 |

    Make Cinco de Mayo a Day Without a Gringo
     
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