C
[email protected]
- Jan 1, 1970
- 0
The other day I found myself needing a short gate time ~200 mhz
frequency counter for an automated test, and since I had an FPGA board
on hand I whipped one up quickly. Getting it reading and reporting to
my computer was the easy part.
Ah, the input stage....
I've got about 4dBm of RF into 50 ohms to play with - about a volt p-p
or a little more if it's high-Z. The output of the device under test
has a transformer and then a series cap to create an unbalanced output.
I did something ugly with a 3.3v cmos 7406 varient and a feedback
resistor, which works well enough to get an accurate reading on one
version of the device under test, but not on the other (both have been
verified with real test equipment) It also tends to self-oscillate
with no input...
What would be the right way to do this using on hand parts, such as
abused logic, little 1:1 or 2:1 RF transformers, etc? One idea is to
use another gate with a feedback resistor and cap to ground in the hope
of establishing the threshold level, and then using a transformer to
swing another input above and below this. Most parts on hand are SMD -
which means dead bug construction in SOIC scale under the maginifier -
discourages extensive experimentation.
Why do most abuse-of-logic RF applications seem to use NAND gates
rather than inverters? From a digital perspective NAND gates are a
universal element, but once you tie their inputs together, is there
something to be gained from having two inputs in parallel?
Is there a way to use a differential input configuration on an FPGA to
input a balanced RF signal directly? Theoretically this should be an
FPGA clock input... The device in use currently is an Altera Stratix
II, but a Xilinx S3 kit is available.
If ordering things, what would be a good default low supply voltage
HF/VHF gain component to have on hand? I seem to recall lots of
last-millenium ham designs using the MC1350P video IF amp, but what
would make sense today?
frequency counter for an automated test, and since I had an FPGA board
on hand I whipped one up quickly. Getting it reading and reporting to
my computer was the easy part.
Ah, the input stage....
I've got about 4dBm of RF into 50 ohms to play with - about a volt p-p
or a little more if it's high-Z. The output of the device under test
has a transformer and then a series cap to create an unbalanced output.
I did something ugly with a 3.3v cmos 7406 varient and a feedback
resistor, which works well enough to get an accurate reading on one
version of the device under test, but not on the other (both have been
verified with real test equipment) It also tends to self-oscillate
with no input...
What would be the right way to do this using on hand parts, such as
abused logic, little 1:1 or 2:1 RF transformers, etc? One idea is to
use another gate with a feedback resistor and cap to ground in the hope
of establishing the threshold level, and then using a transformer to
swing another input above and below this. Most parts on hand are SMD -
which means dead bug construction in SOIC scale under the maginifier -
discourages extensive experimentation.
Why do most abuse-of-logic RF applications seem to use NAND gates
rather than inverters? From a digital perspective NAND gates are a
universal element, but once you tie their inputs together, is there
something to be gained from having two inputs in parallel?
Is there a way to use a differential input configuration on an FPGA to
input a balanced RF signal directly? Theoretically this should be an
FPGA clock input... The device in use currently is an Altera Stratix
II, but a Xilinx S3 kit is available.
If ordering things, what would be a good default low supply voltage
HF/VHF gain component to have on hand? I seem to recall lots of
last-millenium ham designs using the MC1350P video IF amp, but what
would make sense today?
