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First I think this is homework, so I'll move the thread.
Second: the state of Q is not important. Flip-flops are typically edge triggered. The state of a flip-flop changes with either the rising edge (clock from 0->1) or the faling edge (clock from 1>0), depending on the type of flip-flop.
You also need to know what type of flip-flop you have. There are many different types like RS-FF. JK-FF, D-FF and others. From your simple truth table one can assume you have a D-flip-flop. A D-flip-flop changes the output to the same state as the input with a clock edge.
Now:
- find out what clock sensitivity (rising or falling) your flip-flop has
- find out what type of flip-flop you have
Then you have everything tocreate a meaningful truth table.
First I think this is homework, so I'll move the thread.
Second: the state of Q is not important. Flip-flops are typically edge triggered. The state of a flip-flop changes with either the rising edge (clock from 0->1) or the faling edge (clock from 1>0), depending on the type of flip-flop.
You also need to know what type of flip-flop you have. There are many different types like RS-FF. JK-FF, D-FF and others. From your simple truth table one can assume you have a D-flip-flop. A D-flip-flop changes the output to the same state as the input with a clock edge.
Now:
- find out what clock sensitivity (rising or falling) your flip-flop has
- find out what type of flip-flop you have
Then you have everything tocreate a meaningful truth table.
i want to ask when clock is not rise what will be the Qn?
D Clk Qn
--------|------
0 0 ? what will be 0 or 1 and why?
0 1 0 clock is raising from 0 to 1 so Qn will become as same as input D
1 0 ? what will be 0 or 1 and why ?
1 1 1 clock is raising from 0 to 1 so Qn will become as same as input D
D clk | QnThis truth table is useless. There are no clock edges to show the change in Q. Also the state of Q depends on the state of D during the active clock edge.
Normally you use symbols to note these key elements in the truth table.
Hint:
Use e.g. ^ to indicate a rising clock edge (active)
Use e.g. x to indicate a don't care (state of the signal can be 0 or 1 without any
difference)
Use Qn-1 to indicate the state of Q shortly before.
Make a table like this:
D clk | Qn
-------------
x 0 | Qn-1 <- the state of Q doesn't change when clock is 0
x 1 | Qn-1 <- the state of Q doesn't change when clock is 1
0 ^ | ??? <- place your answer here
1 ^ | ??? <- place your answer here
You may also look up the datasheet of the7474 integrated circuit which explains the operation of a D-type Flipflop.
D clk | Qn
-------------
0 0 | ? the state of Q doesn't change when clock is 0 what will be Qn 0 or 1 and why
ok if someone say draw the truth table for D flip flop so what is the truth table for D flip flopit will be Qn-1 (assuming that Qn-1 is the state Q was in some small time earlier.
why? Because that's the function of the device!
You haven't given the states on a falling edge either.
That's what you're supposed to find out, isn't it?what is the truth table for D flip flop