Variable amplitude clock?

[jdhar]

I have a project where I need to design a clock circuit that has
variable amplitude (from ~1.2V - 3.3V). The input clock to this
variable gain stage would be 3.3V, but I have to be able to scale it
down to 1.2V if necessary. Digital control of the gain would be nice,
but not necessary. The clock would need to be ~50Mhz max.

Some options I was thinking of...
- Opamps/variable gain amplifiers come to mind, however, I don't think
they would work well with square waves - would they?
- I could maybe use discrete FETs and use an independent voltage
supply to the FETs that I can program digitally
- Using a high-speed DAC would be good, but I'm not sure if jitter
would be a problem here. WIth a DAC, I could control the high and low
levels precisely, which seems to be the best solution... rise and fall
time maybe an issue to.

Does anyone know how this is typically done with function generators
etc?

 

[Joerg]

I have a project where I need to design a clock circuit that has
variable amplitude (from ~1.2V - 3.3V). The input clock to this
variable gain stage would be 3.3V, but I have to be able to scale it
down to 1.2V if necessary. Digital control of the gain would be nice,
but not necessary. The clock would need to be ~50Mhz max.

Some options I was thinking of...
- Opamps/variable gain amplifiers come to mind, however, I don't think
they would work well with square waves - would they?

At 50MHz and fast transitions? No. Or at least not at reasonable cost.
The Rolls-Royce Deluxe version would be a fast VGA from Analog Devices
but it would likely set you back around $5 or more.

- I could maybe use discrete FETs and use an independent voltage
supply to the FETs that I can program digitally

Servoed FETs is what I did a lot. Then one fine day the SD5400 became
expensive and nearly unobtanium :-(

Alternatively you can use an open drain logic chip and switch resistors
in an R2R fashion.

- Using a high-speed DAC would be good, but I'm not sure if jitter
would be a problem here. WIth a DAC, I could control the high and low
levels precisely, which seems to be the best solution... rise and fall
time maybe an issue to.

Jitter depends on the quality of your layout, mostly. Must be RF style.
Another trick with a slowish and cheap DAC is to take a current source
version where you can use the resistor ladder as a "digitally controlled
resistor".

Does anyone know how this is typically done with function generators
etc?

Don't know, but there is yet another option: Digital potmeters. They
have become quite cheap and you can clock in which tap you want. The
number of taps is limited though, often there are only 64.

 

[[email protected]]

I have a project where I need to design a clock circuit that has
variable amplitude (from ~1.2V - 3.3V). The input clock to this
variable gain stage would be 3.3V, but I have to be able to scale it
down to 1.2V if necessary. Digital control of the gain would be nice,
but not necessary. The clock would need to be ~50Mhz max.

Some options I was thinking of...
- Opamps/variable gain amplifiers come to mind, however, I don't think
they would work well with square waves - would they?
- I could maybe use discrete FETs and use an independent voltage
supply to the FETs that I can program digitally
- Using a high-speed DAC would be good, but I'm not sure if jitter
would be a problem here. WIth a DAC, I could control the high and low
levels precisely, which seems to be the best solution... rise and fall
time maybe an issue to.

Does anyone know how this is typically done with function generators
etc?

Passive attenuators.

 

[jdhar]

Thanks for your reply, very helpful!

Some responses...

1. Firstly, cost isn't a factor (isn't that nice!). So if a fast VGA
from ADI would work, then that's worth considering... the only thing
is I don't think I would be able to add a common-mode with this setup,
unless I passed it through a level-shift stage, right? This is still a
good option though if it would work.
2. I like your idea of open-drain logic...the only thing I would be
afraid of here is if I'm interfacing to a non-high impedance load, or
even a current drive clock receiver. With a VGA or DAC, this shouldn't
be an issue.
3. The other problem I thought of with a DAC is that it doesn't really
let me control the frequency all that much. If I use a 100Mhz DAC, I
can get a 50MHz clock, but I couldn't get a 40, which would be key.
Unless there are advanced techniques that could be used that I'm not
aware of.

Currently, the clock generation portion is using a PLL chip, which is
nice because I can lock to another clock, and generate almost any
frequency. Combined with a VGA, if that would work, that may fit the
bill.

 

[jdhar]

This would only work with a matched load, right?

Passive attenuators.

 

[Fred Bloggs]

I have a project where I need to design a clock circuit that has
variable amplitude (from ~1.2V - 3.3V). The input clock to this
variable gain stage would be 3.3V, but I have to be able to scale it
down to 1.2V if necessary. Digital control of the gain would be nice,
but not necessary. The clock would need to be ~50Mhz max.

Some options I was thinking of...
- Opamps/variable gain amplifiers come to mind, however, I don't think
they would work well with square waves - would they?
- I could maybe use discrete FETs and use an independent voltage
supply to the FETs that I can program digitally
- Using a high-speed DAC would be good, but I'm not sure if jitter
would be a problem here. WIth a DAC, I could control the high and low
levels precisely, which seems to be the best solution... rise and fall
time maybe an issue to.

Does anyone know how this is typically done with function generators
etc?

Who the hell knows how it's "typically done with function generators
etc"- you could try something like this, but it's getting close hitting
50MHz at the low voltages, will depend on your loading. Have you omitted
a minor detail like it's supposed to be a 50R driver, if so then back it
up with a standard series terminated video amp:
View in a fixed-width font such as Courier.

..
..
..
..
..
.. Vamp>--------+-||--.
.. | |
.. | ---
.. | com
.. |\
.. CLK >------| >------>VAR_AMP_CLK
.. 3.3V |/
.. LOGIC | 74AUP1G34
.. |
.. --- MOS gate with overvoltage
.. /// tolerant inputs
..
.. http://www.standardics.nxp.com/products/aup/datasheet/74aup1g34.pdf
..
..
..
..
..
..

 

[jdhar]

Thanks Fred, I was looking for an IC like this for some time, but
couldn't find it! I nee to drive a High-Z load, so I think this may
work if I vary the supply. Most ICs I found couldn't go this low in
Voltage.

 

[jdhar]

Fred, would you happen to know of anything similar that could handle a
differential input? Or take a S.E. input and convert to D.E. output? I
could just take 2 of these and put on the + side and the other on -
side, but I'm worried that they won't be matched to eachother, and the
amplitudes would be off.

 

[Joerg]

Thanks for your reply, very helpful!

Most welcome. Just a suggestion: It is better to respond below quotes,
makes it easier for other to follow and contribute some more ideas.

Some responses...

1. Firstly, cost isn't a factor (isn't that nice!). So if a fast VGA
from ADI would work, then that's worth considering... the only thing
is I don't think I would be able to add a common-mode with this setup,
unless I passed it through a level-shift stage, right? This is still a
good option though if it would work.

Many AD chips are differential, others contain two VGAs on one chip. But
you have to find one that can swing a few volts at the required speed.
So the slew rate would be one parameter to take a look at.

2. I like your idea of open-drain logic...the only thing I would be
afraid of here is if I'm interfacing to a non-high impedance load, or
even a current drive clock receiver. With a VGA or DAC, this shouldn't
be an issue.

Many logic chips feature an RDSon of 30ohms or less.

3. The other problem I thought of with a DAC is that it doesn't really
let me control the frequency all that much. If I use a 100Mhz DAC, I
can get a 50MHz clock, but I couldn't get a 40, which would be key.
Unless there are advanced techniques that could be used that I'm not
aware of.

Ok, I didn't know you want to control the frequency with the DAC. That
tends to become expensive. Well, at least for my usual BOM budgets.

Currently, the clock generation portion is using a PLL chip, which is
nice because I can lock to another clock, and generate almost any
frequency. Combined with a VGA, if that would work, that may fit the
bill.

A VGA is probably the easiest solution if you can find one that is fast
enough at the maximum desired output level. Then all you need in
addition is a slow serial DAC to set the gain from your controller.

 

[Joerg]

Thanks Fred, I was looking for an IC like this for some time, but
couldn't find it! I nee to drive a High-Z load, so I think this may
work if I vary the supply. Most ICs I found couldn't go this low in
Voltage.

If you do that add a resistor in series with the input in order not to
exceed the substrate diode abs max ratings. And don't let Jim Thompson
see that ;-)

 

[Fred Bloggs]

Fred, would you happen to know of anything similar that could handle a
differential input? Or take a S.E. input and convert to D.E. output? I
could just take 2 of these and put on the + side and the other on -
side, but I'm worried that they won't be matched to eachother, and the
amplitudes would be off.

Right, if matching, low skew, and jitter are concerns then you will need
to stick with clock driver product lines. Check with
http://www.pericom.com/ and http://www.onsemi.com for a start...

 

[Fred Bloggs]

If you do that add a resistor in series with the input in order not to
exceed the substrate diode abs max ratings. And don't let Jim Thompson
see that ;-)

That's NOT how overvoltage tolerant logic works!

 

[Joerg]

That's NOT how overvoltage tolerant logic works!

If it's a level translator, ok. But the datasheet only says 3.6V I/O
tolerant, not much more info other than a substrate diode 50mA abs max:

http://focus.ti.com/lit/ds/symlink/sn74aup1g34.pdf

I wish they would give as much info as they used to in the good old
days, with a circuit diagram ans such.

 

[John Larkin]

I have a project where I need to design a clock circuit that has
variable amplitude (from ~1.2V - 3.3V). The input clock to this
variable gain stage would be 3.3V, but I have to be able to scale it
down to 1.2V if necessary. Digital control of the gain would be nice,
but not necessary. The clock would need to be ~50Mhz max.

Some options I was thinking of...
- Opamps/variable gain amplifiers come to mind, however, I don't think
they would work well with square waves - would they?
- I could maybe use discrete FETs and use an independent voltage
supply to the FETs that I can program digitally
- Using a high-speed DAC would be good, but I'm not sure if jitter
would be a problem here. WIth a DAC, I could control the high and low
levels precisely, which seems to be the best solution... rise and fall
time maybe an issue to.

Does anyone know how this is typically done with function generators
etc?

There are lots of TinyLogic type gates that will work from 1.8 to 5
volts power, and tolerate up to 7 volt inputs. I'd suggest using a
variable dc power supply (LM317 plus trimpot, or 317 programmed by a
DAC) to run one of these gadgets.

You might want to use a schmitt gate and/or divide down the output a
bit, depending on your details.

Oh, you could also just start with a 3.3 volt swing and scale it down
with a trimpot, 100 ohms maybe...


3.3v or so
|
|\|
| \
in-------| ----------+
| / |
|/ /
pot \<----------out
/
\
|
|
gnd


which works to at least 500 MHz with a typical small surface-mount
trimpot.


John

 

[Joerg]

There are lots of TinyLogic type gates that will work from 1.8 to 5
volts power, and tolerate up to 7 volt inputs. I'd suggest using a
variable dc power supply (LM317 plus trimpot, or 317 programmed by a
DAC) to run one of these gadgets.

That's what Fred was saying. How do they do that?

 

[Fred Bloggs]

If it's a level translator, ok. But the datasheet only says 3.6V I/O
tolerant, not much more info other than a substrate diode 50mA abs max:

http://focus.ti.com/lit/ds/symlink/sn74aup1g34.pdf

I wish they would give as much info as they used to in the good old
days, with a circuit diagram ans such.

See document page 4. in
http://www.standardics.nxp.com/support/documents/logic/pdf/an10156.pdf

 

[[email protected]]

There are lots of TinyLogic type gates that will work from 1.8 to 5
volts power, and tolerate up to 7 volt inputs. I'd suggest using a
variable dc power supply (LM317 plus trimpot, or 317 programmed by a
DAC) to run one of these gadgets.

or somthing like this with two supplies:
http://focus.ti.com/docs/prod/folders/print/sn74avch1t45.html


-Lasse

 

[jdhar]

There are lots of TinyLogic type gates that will work from 1.8 to 5
volts power, and tolerate up to 7 volt inputs. I'd suggest using a
variable dc power supply (LM317 plus trimpot, or 317 programmed by a
DAC) to run one of these gadgets.

You might want to use a schmitt gate and/or divide down the output a
bit, depending on your details.

Oh, you could also just start with a 3.3 volt swing and scale it down
with a trimpot, 100 ohms maybe...

3.3v or so
|
|\|
| \
in-------| ----------+
| / |
|/ /
pot \<----------out
/
\
|
|
gnd

which works to at least 500 MHz with a typical small surface-mount
trimpot.

John

Thanks John. I think that wouldn't work in the case where the clock
receiver pulls any current since it's just a passive divider, correct?
Taht would only work in the High-Z case.

 

[John Fields]

I have a project where I need to design a clock circuit that has
variable amplitude (from ~1.2V - 3.3V). The input clock to this
variable gain stage would be 3.3V, but I have to be able to scale it
down to 1.2V if necessary. Digital control of the gain would be nice,
but not necessary. The clock would need to be ~50Mhz max.

Some options I was thinking of...
- Opamps/variable gain amplifiers come to mind, however, I don't think
they would work well with square waves - would they?
- I could maybe use discrete FETs and use an independent voltage
supply to the FETs that I can program digitally
- Using a high-speed DAC would be good, but I'm not sure if jitter
would be a problem here. WIth a DAC, I could control the high and low
levels precisely, which seems to be the best solution... rise and fall
time maybe an issue to.

Does anyone know how this is typically done with function generators
etc?

 

[Joerg]

See document page 4. in
http://www.standardics.nxp.com/support/documents/logic/pdf/an10156.pdf

Thanks. They don't have the AUP family by they mention the AUC famil;y
to be overvoltage tolerant up to 3.3V.