hi, i was reading about sample and hold circuits and i dint quite
understand a few sentences......it said that s and h ckts are not
required for low speed signals while they are of the utmost necessity
for high speed circuits. can someone explain y? thanx
sunil
Because whatever follows the sample and hold needs time to do it's job on
the measurement. Most commonly, the thing following will be an ADC, and
you want to (a) sample at a well-controlled point in time and (b) give
the ADC time to do a conversion. A successive-approximation converter
goes through several steps that need to happen when the input voltage is
constant, if the input signal moves significantly during this conversion
period then the measurement will be confused.
Note that life is more complicated than this: Few ADCs require sample-
and-hold circuits these days. Unless you're doing something special with
a special ADC chances are that the ADC has a built-in sample & hold
circuit, or is a switched-capacitance type that incorporates the sample &
hold function into the fabric of the A to D conversion.
--
Tim Wescott
Control systems and communications consulting
http://www.wescottdesign.com
Need to learn how to apply control theory in your embedded system?
"Applied Control Theory for Embedded Systems" by Tim Wescott
Elsevier/Newnes,
http://www.wescottdesign.com/actfes/actfes.html