Gap, Creepage and Clearance for HF HV

[D from BC]

Hello D from BC,

There are three things; Creepage, corona and distance through air.
According to "Reference data for Engineers" (Newnes):

Break down voltage for uniform E-field in air at sea level and room
temperature is 75kVp/inch, 30kVp/cm. Valid up to 300 MHz, use a safety
margin.

So you should evaluate the worst-case field strength for your
application. Highest field strength will probably occur at an air/
insulation transition on thin wire.

Corona discharge
When corona discharge occurs at an air/insulation transition,
frequency comes in play. High frequency will give higher corona effect
and erosion of the insulation will go faster. When the insulation
finally breaks down (under emission of material), the eroded material
helps to lower the air breakdown voltage significantly. A nice smooth
sounding arc will occur with nice smoke and color effects (I played
many times with that [with plenty of water nearby in case of fire]).

Also with high frequency, the zero voltage transition is too short to
extinguish the arc.

I use an RF receiver with high pass filter to search for corona
discharge in HV circuits.

Creepage is another thing. An arc is formed by miniscule discharges
over a (polluted) surface. Here evaporated material also helps the
ionization process to establish and maintain the arc. 300Vp requires
about 1.1mm insulation between traces on an uncoated PCB (functional
insulation, not safety insulation).

When breakdown of a barrier involves a safety hazard, there are
minimum requirements for distance trough air (clearance) and distance
over surface (creepage). Here transient over voltage must also be
taken into account (4kV for 230V mains building installation
equipment) and the type of insulation system (basic or double/
reinforced). To read more for free, go to
http://www.ecma-international.org/publications/standards/Standard.htm.
Go to ECMA287 it is like IEC950, but then for free.

300V/ 700 kHz does not arc that fast (I used same frequency in a power
circuit). Are you sure that there are no higher transient voltages
present in that waveform? Did you clean the board after soldering,
etc?

Best regards,

Wim
PA3DJS
www.tetech.nl

Errr...noooo... I didn't clean the board...Doh!
I used a flux pen on the pcb for better soldering and then used flux
core solder.
There's visible rosin between the HV and gnd traces spaced 15mil to
20mil apart..

Your post should help. Thanks.
D from BC

It's quite common in HV PCB designs to route out a slot in your PCB to
separate high voltage traces.
Also commonly used for low leakages designs too.

Dave.

So that's what that's for...
I saw that many years ago on a pcb..I don't recall where the pcb came
from (a tv?) but I do remember those mystery slots.
Mystery no more.
D from BC

 

[D from BC]

Our multiplier stages had either fully buried traces where the only
thing exposed was the via/component mount hole, or they were all on one
side, and the assembly was vacuum potted.

You may want to bake your assembly at approx 60C for an hour, and even
place it under a vacuum for about ten minutes. PCB material is
hygroscopic (soaks up water). Both FR4 and G10 are hygroscopic.

The way we cleaned our boards, we could detect more moisture trapped in
a masked PCB than in the unmasked multiplier areas of our designs. The
unmasked area was also more receptive of the potting primer, and thereby
caused less potting detachment issues. Definitely the way to go with
potted HV assemblies. We even grit blasted the glassy finish off our
dipped capacitors to get superior potting adhesion. One fingerprint
blows the whole multiplier though.

You should watch out for sharp corners in your traces too. We even
used arced (sp) traces when it yielded a benefit.

I'll be praying to the Electron God that I don't have to do something
like that
It's interesting how involved some designs are to control arcing and
corona.
D from BC

 

[Frithiof Andreas Jensen]

Huhhhh...My smps design did a little plasma show....zzzzzzzzz
then the power mosfet shorted out..
then the fuses blew..
I suspect arcing somewhere perhaps due to not enough PCB trace to
trace clearance. (Just trying to increase PCB density...)

"Somewhere" .... What kind of weak crap is that? The burn mark is flaming
obvious!

I have about 300Vpk @ 700Khz square wave areas on the PCB....

EN 60950 sez: 2 - 4 mm creapage distance, 2 mm for FR4 fiber-glass boards
and the 4 mm for paper-board (the brown stuff).

I know air breakdown depends on gap and voltage, but does air
breakdown voltage also depend on frequency?

Nah - your "about" is what kills: there is likely a needle on your 300Vpk
going to maybe 600 V?

(Assume humidity, pollutants or gases like N2,CO2,O2 are constant.)

Why worry about third-order effects if you do not care enough about 1'st
order to describe/measure?

 

[D from BC]

Well, don't make fat pads!
You can bend the leads before mounting to give you a staggered pin
spacing which increases the pin spacing a lot.

Dave.

Ohhh..nooo..
I've seen it done but just didn't think of it.
My pcb work is getting trashier by the post. ...

D from BC

 

[D from BC]

Line-op stuff I see often has wide spacing (>0.2", I guess) and notches
punched out of the board to eliminate creepage as such entirely. At least,
the better stuff.

True, you may not have the luxury of that much space.

Tim

That's a little disturbing to know when I'm trying out pcb design for
about double the voltage and about 12 000 times the frequency.

It was probably unwise for me to make a prototype with a high pcb
density at voltages and frequencies I'm not familiar with. Risky...
D from BC

 

[D from BC]

I've seen (and have, I think) some TO-220's rated to 1500Vcbo. Most such
devices extend epoxy around the center pin (collector), but still. Makes ya
wonder...

(On the other hand, I have some deflection transistors that are TO-247
sized, ISO-TO-220 shaped (i.e. covered in black plastic), and the center pin
has extended plastic. Now that I would trust. Uh, 2SC5041 or something
like that.)

Tim

I took a look on digikey..

The STP4N150 N channel mosfet has a 1500V rating in the TO-220 (pitch
~0.1").

This suggests the spacing is good at any frequency (without heat burn
out) up to 1500V switching.

I've seen many mosfet datasheets and never seen anything like..
"Do not switch 1500V beyond 1Mhz or increased risk of pin to pin
arcing."
D from BC

 

[ChairmanOfTheBored]

Well, don't make fat pads!
You can bend the leads before mounting to give you a staggered pin
spacing which increases the pin spacing a lot.

Dave.

The oval pad layout, and the term for the lead bending is SPLAYED
leads.

 

[ChairmanOfTheBored]

Hello D from BC,

There are three things; Creepage, corona and distance through air.
According to "Reference data for Engineers" (Newnes):

Break down voltage for uniform E-field in air at sea level and room
temperature is 75kVp/inch, 30kVp/cm. Valid up to 300 MHz, use a safety
margin.

So you should evaluate the worst-case field strength for your
application. Highest field strength will probably occur at an air/
insulation transition on thin wire.

Corona discharge
When corona discharge occurs at an air/insulation transition,
frequency comes in play. High frequency will give higher corona effect
and erosion of the insulation will go faster. When the insulation
finally breaks down (under emission of material), the eroded material
helps to lower the air breakdown voltage significantly. A nice smooth
sounding arc will occur with nice smoke and color effects (I played
many times with that [with plenty of water nearby in case of fire]).

Also with high frequency, the zero voltage transition is too short to
extinguish the arc.

I use an RF receiver with high pass filter to search for corona
discharge in HV circuits.

Creepage is another thing. An arc is formed by miniscule discharges
over a (polluted) surface. Here evaporated material also helps the
ionization process to establish and maintain the arc. 300Vp requires
about 1.1mm insulation between traces on an uncoated PCB (functional
insulation, not safety insulation).

When breakdown of a barrier involves a safety hazard, there are
minimum requirements for distance trough air (clearance) and distance
over surface (creepage). Here transient over voltage must also be
taken into account (4kV for 230V mains building installation
equipment) and the type of insulation system (basic or double/
reinforced). To read more for free, go to
http://www.ecma-international.org/publications/standards/Standard.htm.
Go to ECMA287 it is like IEC950, but then for free.

300V/ 700 kHz does not arc that fast (I used same frequency in a power
circuit). Are you sure that there are no higher transient voltages
present in that waveform? Did you clean the board after soldering,
etc?

Best regards,

Wim
PA3DJS
www.tetech.nl


Errr...noooo... I didn't clean the board...Doh!
I used a flux pen on the pcb for better soldering and then used flux
core solder.
There's visible rosin between the HV and gnd traces spaced 15mil to
20mil apart..

Your post should help. Thanks.
D from BC

Rosin, RMA, Aqueous?

Kester flux pen # 951 low solids no clean and then I used Multicore
solder which I believe contains rosin.

I haven't looked it up yet but I bet the breakdown voltage of this
flux combo is probably much less than air for a 20mil separation
between two top pcb traces with a potential diff of 300vpeak..
And I'm thinking about the frequency and square waveform making it
easier to arc through the flux too..
D from BC

No clean is very bad (solids or not) for Medium and High Voltage
designs.

 

[D from BC]

"Somewhere" .... What kind of weak crap is that? The burn mark is flaming
obvious!


EN 60950 sez: 2 - 4 mm creapage distance, 2 mm for FR4 fiber-glass boards
and the 4 mm for paper-board (the brown stuff).


Nah - your "about" is what kills: there is likely a needle on your 300Vpk
going to maybe 600 V?


Why worry about third-order effects if you do not care enough about 1'st
order to describe/measure?

It's not obvious so far where the arc occurred.
I saw it.. I heard it, but it was so quick I can only say it's within
a square centimeter.
I have to remove some parts that are in the way to get a closer with a
magnifying glass.
I'm not sure but I think I see tiny holes in big SMD power resistor.
Hot spots?

I put a 2A fuse on the bulk capacitor (200uF charged to line peak
about 170V). Without it, I think I'd have obvious destruction.

recti >----+-----2A fuse--->to smps
|
200uf,200V
|
|
com

It's been suggested in other posts, that my design could be "spiking"
beyond expected and could start an arc.
Perhaps an unexpected spike beyond 300V (my design is supposed to work
without snubbers) across a flux gobbed 20mil gap provided conditions
for an arc. That or an SMD part failed with an arcing effect.

Besides...I should practice including creepage distances in my pcb
artwork. Which I'm just learning about.

2 mm creepage... Does that mean a 2mm distance between two parallel
traces (top side) on a FR4 pcb for 300V 700khz. Or is that the spacing
between top side and bottom side traces for 300V 700khz?
D from BC

 

[D from BC]

Hello D from BC,

There are three things; Creepage, corona and distance through air.
According to "Reference data for Engineers" (Newnes):

Break down voltage for uniform E-field in air at sea level and room
temperature is 75kVp/inch, 30kVp/cm. Valid up to 300 MHz, use a safety
margin.

So you should evaluate the worst-case field strength for your
application. Highest field strength will probably occur at an air/
insulation transition on thin wire.

Corona discharge
When corona discharge occurs at an air/insulation transition,
frequency comes in play. High frequency will give higher corona effect
and erosion of the insulation will go faster. When the insulation
finally breaks down (under emission of material), the eroded material
helps to lower the air breakdown voltage significantly. A nice smooth
sounding arc will occur with nice smoke and color effects (I played
many times with that [with plenty of water nearby in case of fire]).

Also with high frequency, the zero voltage transition is too short to
extinguish the arc.

I use an RF receiver with high pass filter to search for corona
discharge in HV circuits.

Creepage is another thing. An arc is formed by miniscule discharges
over a (polluted) surface. Here evaporated material also helps the
ionization process to establish and maintain the arc. 300Vp requires
about 1.1mm insulation between traces on an uncoated PCB (functional
insulation, not safety insulation).

When breakdown of a barrier involves a safety hazard, there are
minimum requirements for distance trough air (clearance) and distance
over surface (creepage). Here transient over voltage must also be
taken into account (4kV for 230V mains building installation
equipment) and the type of insulation system (basic or double/
reinforced). To read more for free, go to
http://www.ecma-international.org/publications/standards/Standard.htm.
Go to ECMA287 it is like IEC950, but then for free.

300V/ 700 kHz does not arc that fast (I used same frequency in a power
circuit). Are you sure that there are no higher transient voltages
present in that waveform? Did you clean the board after soldering,
etc?

Best regards,

Wim
PA3DJS
www.tetech.nl


Errr...noooo... I didn't clean the board...Doh!
I used a flux pen on the pcb for better soldering and then used flux
core solder.
There's visible rosin between the HV and gnd traces spaced 15mil to
20mil apart..

Your post should help. Thanks.
D from BC


Rosin, RMA, Aqueous?

Kester flux pen # 951 low solids no clean and then I used Multicore
solder which I believe contains rosin.

I haven't looked it up yet but I bet the breakdown voltage of this
flux combo is probably much less than air for a 20mil separation
between two top pcb traces with a potential diff of 300vpeak..
And I'm thinking about the frequency and square waveform making it
easier to arc through the flux too..
D from BC

No clean is very bad (solids or not) for Medium and High Voltage
designs.

It's getting a cleaning next time.

If only I had a no clean residue spice model
Everything works so nice in spice..

Well.. I have to work on adjustments to the pcb design with
corona/creepage eyes.

It would be cool if PCB layout software knew what voltages exist and
warned me of broken creepage/corona rules.
D from BC

 

[Steve]

It's not obvious so far where the arc occurred.
I saw it.. I heard it, but it was so quick I can only say it's within
a square centimeter.
I have to remove some parts that are in the way to get a closer with a
magnifying glass.
I'm not sure but I think I see tiny holes in big SMD power resistor.
Hot spots?

I put a 2A fuse on the bulk capacitor (200uF charged to line peak
about 170V). Without it, I think I'd have obvious destruction.

recti >----+-----2A fuse--->to smps
|
200uf,200V
|
|
com

It's been suggested in other posts, that my design could be "spiking"
beyond expected and could start an arc.
Perhaps an unexpected spike beyond 300V (my design is supposed to work
without snubbers) across a flux gobbed 20mil gap provided conditions
for an arc. That or an SMD part failed with an arcing effect.

Besides...I should practice including creepage distances in my pcb
artwork. Which I'm just learning about.

2 mm creepage... Does that mean a 2mm distance between two parallel
traces (top side) on a FR4 pcb for 300V 700khz. Or is that the spacing
between top side and bottom side traces for 300V 700khz?
D from BC

Definition of creepage is "the shortest distance along a surface of an
insulating material between two conductive parts. "
It doesn't matter if the conductive parts are parallel traces or just IC
pads or any other copper feature (like ground fills). Its the shortest
distance, regardless of the path.

Creepage distance for a top/bottom pair is usually pretty long, because the
path is to the outer edge of the PCB, down the thickness of the board and
back across to the other conductor. An .060 board already gives you ~1.5 mm
vertically. In the earlier posts regarding slots , its assumed the worst
case problems occur on a common surface, and the creepage path is then
around the edge of the slot. Beware that the IEC creepage distance rules
say that if the slots are too narrow - they can't be considered in total
distance. I forget what the actual slot width is before they are considered
effective.

Steve

 

[D from BC]

oops..Need to rewrite..

Aside from gap width, voltage and gas mix, does breakdown in air also
depend on frequency?


D from BC

After picking at the board for awhile here's the results:

A dampening resistor (Cuk smps design) SMD 2512 1W thick film resistor
burned open.
There's 101 printed on the resistor chip.. The 0 is barely visible
from the heat damage.

In spice..
If this resistor burns open, the smps goes out of control and any gaps
in the resistor gets 400Vpeak oscillating at 7khz..

Hey..that's probably the sound I heard and the arc I saw.

I know this resistor does get hit hard by a short impulse current upon
start up.. It's a pita to simulate due lots of other parts that form
the smps power up surge profile.
Most likely I goofed picking this part.

Anyways.. from all the posts I learned that my pcb artwork needs to
respect corona and creepage and a flux free pcb can help too.

D from BC

 

[Paul Mathews]

It's not obvious so far where the arc occurred.
I saw it.. I heard it, but it was so quick I can only say it's within
a square centimeter.
I have to remove some parts that are in the way to get a closer with a
magnifying glass.
I'm not sure but I think I see tiny holes in big SMD power resistor.
Hot spots?

I put a 2A fuse on the bulk capacitor (200uF charged to line peak
about 170V). Without it, I think I'd have obvious destruction.

recti >----+-----2A fuse--->to smps
|
200uf,200V
|
|
com

It's been suggested in other posts, that my design could be "spiking"
beyond expected and could start an arc.
Perhaps an unexpected spike beyond 300V (my design is supposed to work
without snubbers) across a flux gobbed 20mil gap provided conditions
for an arc. That or an SMD part failed with an arcing effect.

Besides...I should practice including creepage distances in my pcb
artwork. Which I'm just learning about.

2 mm creepage... Does that mean a 2mm distance between two parallel
traces (top side) on a FR4 pcb for 300V 700khz. Or is that the spacing
between top side and bottom side traces for 300V 700khz?
D from BC- Hide quoted text -

- Show quoted text -

I'll go out on a limb and suggest that the more likely failure
scenario is something like this (rather than HV breakdown of anything
per se):
loop instability --> power overload --> cracking of conductors and/or
insulation --> arcing --> cascading component failures

Of course, it's always best to insure that voltage spikes are kept to
safe levels, but primarily to avoid component breakdowns rather than
arcing or corona, that is, until the voltages involved get
sufficiently high for corona. The highest voltage I see mentioned was
+/-300V, and let's double that to allow for some spiking. At 600V, I
wouldn't expect arcing, unless your spacing is really small, and I
wouldn't expect flux to cause problems, either. Again, I propose the
above failure scenario as more likely.

I suggest you get a good handle on your loop stability or else damp it
way down until you've had a chance to take care of all the little
transients, properly snubbing them or minimizing the parasitics that
cause them. Then, if you're using current feedback, make sure that
your control circuit is getting a clean trapezoid that doesn't get
sampled until after the initial switching transient subsides. Make
sure slope compensation is adequate. Then, you can begin to take steps
to speed up the loop.
Paul Mathews

 

[D from BC]

I'll go out on a limb and suggest that the more likely failure
scenario is something like this (rather than HV breakdown of anything
per se):
loop instability --> power overload --> cracking of conductors and/or
insulation --> arcing --> cascading component failures

Of course, it's always best to insure that voltage spikes are kept to
safe levels, but primarily to avoid component breakdowns rather than
arcing or corona, that is, until the voltages involved get
sufficiently high for corona. The highest voltage I see mentioned was
+/-300V, and let's double that to allow for some spiking. At 600V, I
wouldn't expect arcing, unless your spacing is really small, and I
wouldn't expect flux to cause problems, either. Again, I propose the
above failure scenario as more likely.

I suggest you get a good handle on your loop stability or else damp it
way down until you've had a chance to take care of all the little
transients, properly snubbing them or minimizing the parasitics that
cause them. Then, if you're using current feedback, make sure that
your control circuit is getting a clean trapezoid that doesn't get
sampled until after the initial switching transient subsides. Make
sure slope compensation is adequate. Then, you can begin to take steps
to speed up the loop.
Paul Mathews

I found a blown power chip resistor. I think I got the impulse power
handling wrong and chose an underrated resistor.
It burned out and arced. Fooled me.

I'm going to replace the resistor with something impossible to burn
out just to continue testing.
I'm sure there's more bugs.. Always is with loose cannon design

I am using current feedback but my control doesn't use blanking.
I think it's called that.
Blanking to make sure that the feedback current control doesn't
respond to the switching transient. The blanking is a delay function.
It's like the feedback is suspended until the blanking time passes.

My smps design works great in spice without blanking but I haven't
modeled everything and I'm still suspicious.

I tried throwing a wrench in the gears....
In spice, the smps loses control with inductors with severe
interwinding capacitance (Cuk topo).
The transients mess up the feedback.
A blanking function would fix that. But, I'm not using inductors like
that.

I'll be checking everything that you listed.
It's all good stuff

D from BC

 

[Paul Mathews]

I found a blown power chip resistor. I think I got the impulse power
handling wrong and chose an underrated resistor.
It burned out and arced. Fooled me.

I'm going to replace the resistor with something impossible to burn
out just to continue testing.
I'm sure there's more bugs.. Always is with loose cannon design

I am using current feedback but my control doesn't use blanking.
I think it's called that.
Blanking to make sure that the feedback current control doesn't
respond to the switching transient. The blanking is a delay function.
It's like the feedback is suspended until the blanking time passes.

My smps design works great in spice without blanking but I haven't
modeled everything and I'm still suspicious.

I tried throwing a wrench in the gears....
In spice, the smps loses control with inductors with severe
interwinding capacitance (Cuk topo).
The transients mess up the feedback.
A blanking function would fix that. But, I'm not using inductors like
that.

I'll be checking everything that you listed.
It's all good stuff

D from BC- Hide quoted text -

- Show quoted text -

You can add some 'blanking' time by paralleling the current sense
resistor with a fairly large capacitance (needed because Rsense is
quite small) and/or adding an RC filter to the current sense input.
This will affect the minimum load for stability (increase it), but the
undesirable transient also has that effect.
It's easy to add some capacitance to your Spice model to generate the
switch-on transient that is the bane of current feedback designs.
Think about it.
Rectifier reverse recovery characteristics, leakage inductance and
layout inductance (loop area), and switch turn-on time are all
important determiners of this type of problem.
Paul Mathews

 

[D from BC]

[snip]

You can add some 'blanking' time by paralleling the current sense
resistor with a fairly large capacitance (needed because Rsense is
quite small) and/or adding an RC filter to the current sense input.
This will affect the minimum load for stability (increase it), but the
undesirable transient also has that effect.
It's easy to add some capacitance to your Spice model to generate the
switch-on transient that is the bane of current feedback designs.
Think about it.
Rectifier reverse recovery characteristics, leakage inductance and
layout inductance (loop area), and switch turn-on time are all
important determiners of this type of problem.
Paul Mathews

I think you're saying, assume the worst...

Yup...thought about RC filtering too..
But just the minimal amount to help out the following circuits I use
which also help reduce reaction to spikes.

I can easily make a blanking circuit but RC filtering is easier to add
to an existing prototype pcb.

Simply:

/\/\/\/\/\/\/
spice signal for current feedback

| | | | | |
/|\|/|\|/|\|/
| | | | | |
real world for current feedback (spikes and ringing)
D from BC

 

[Paul Mathews]

[snip]

You can add some 'blanking' time by paralleling the current sense
resistor with a fairly large capacitance (needed because Rsense is
quite small) and/or adding an RC filter to the current sense input.
This will affect the minimum load for stability (increase it), but the
undesirable transient also has that effect.
It's easy to add some capacitance to your Spice model to generate the
switch-on transient that is the bane of current feedback designs.
Think about it.
Rectifier reverse recovery characteristics, leakage inductance and
layout inductance (loop area), and switch turn-on time are all
important determiners of this type of problem.
Paul Mathews

I think you're saying, assume the worst...

Yup...thought about RC filtering too..
But just the minimal amount to help out the following circuits I use
which also help reduce reaction to spikes.

I can easily make a blanking circuit but RC filtering is easier to add
to an existing prototype pcb.

Simply:

/\/\/\/\/\/\/
spice signal for current feedback

| | | | | |
/|\|/|\|/|\|/
| | | | | |
real world for current feedback (spikes and ringing)
D from BC

You need to add a 3rd picture, which is between the other two in
amplitude and relabel them as follows:

Spice (least amplitude)
As seen by control chip (medium amplitude)
As seen by oscilloscope (highest ampliltude) that you're calling 'real
world'

This is because it's difficult to setup a scope probe that doesn't add
to the spike amplitudes. One thing that helps quite a bit sometimes:
wind several turns of the scope coax through a large ferrite toroid or
clamp-on core to improve scope CMRR. Always check what you get when
you 'short' the probe tip using probe ground (whatever you're using).
Paul Mathews

 

[ChairmanOfTheBored]

You can add some 'blanking' time by paralleling the current sense
resistor with a fairly large capacitance (needed because Rsense is
quite small) and/or adding an RC filter to the current sense input.
This will affect the minimum load for stability (increase it), but the
undesirable transient also has that effect.
It's easy to add some capacitance to your Spice model to generate the
switch-on transient that is the bane of current feedback designs.
Think about it.
Rectifier reverse recovery characteristics, leakage inductance and
layout inductance (loop area), and switch turn-on time are all
important determiners of this type of problem.
Paul Mathews

The word for today is Tranzorb.

 

[D from BC]

[snip]

You can add some 'blanking' time by paralleling the current sense
resistor with a fairly large capacitance (needed because Rsense is
quite small) and/or adding an RC filter to the current sense input.
This will affect the minimum load for stability (increase it), but the
undesirable transient also has that effect.
It's easy to add some capacitance to your Spice model to generate the
switch-on transient that is the bane of current feedback designs.
Think about it.
Rectifier reverse recovery characteristics, leakage inductance and
layout inductance (loop area), and switch turn-on time are all
important determiners of this type of problem.
Paul Mathews

I think you're saying, assume the worst...

Yup...thought about RC filtering too..
But just the minimal amount to help out the following circuits I use
which also help reduce reaction to spikes.

I can easily make a blanking circuit but RC filtering is easier to add
to an existing prototype pcb.

Simply:

/\/\/\/\/\/\/
spice signal for current feedback

| | | | | |
/|\|/|\|/|\|/
| | | | | |
real world for current feedback (spikes and ringing)
D from BC

You need to add a 3rd picture, which is between the other two in
amplitude and relabel them as follows:

Spice (least amplitude)
As seen by control chip (medium amplitude)
As seen by oscilloscope (highest ampliltude) that you're calling 'real
world'

This is because it's difficult to setup a scope probe that doesn't add
to the spike amplitudes. One thing that helps quite a bit sometimes:
wind several turns of the scope coax through a large ferrite toroid or
clamp-on core to improve scope CMRR. Always check what you get when
you 'short' the probe tip using probe ground (whatever you're using).
Paul Mathews

Sounds easier than my other idea....
I have a 17Mhz analog optoisolator IC I got from Digikey..
It's a HCPL-4562-000E
http://www.avagotech.com
I thought about using that IC for a battery powered opto probe.
D from BC

 

[YD]

Are you saying that it's possible for the epoxy between traces
(top side trace to top side trace
or top trace to bottom ground plane)
to get fried like too much current through a lossy capacitor?
Cool! A possible headache but still cool.
But dunno yet if that's the case..
Working on it..

I have the 300Vpk at 700Khz between two top traces separated by 20mil.
Beneath these traces is the ground plane separated by 40mil of FR4.
I've yet to do the math if this is ok at this voltage and frequency.

Yikes, that's ~0.5 mm. Still below 1 kV/mm but much too close for
comfort. I suggest something like 80 mil minimum for that kind of
voltage.

I've seen a PCB burned up by 150 V on traces separated by 3 mm (~120
mil). It was phenolic, and got dirty, humid, whatever. The leakage
heated the PCB at some spot and then the charring made it increasingly
worse. Burned it through for the whole length the traces ran together.

- YD.