I need to amplify a signal (actually, 4 of them, one being a clock
pulse) from a digital line from an IC - it's either off - 0v or on at
1.5v, nothing complicated. I need to feed this in to a PIC
microcontroller, so it needs to be at 5v when high.
I assume I'd want to use a transistor, feeding the 1.5v signal in to
the base.
Can I take the amplified 5v signal from a resistor connecting the
emitter to gnd?
I don't think so, as the NPN emitter will have a voltage that is lower than the
base, if it's operating normally. It doesn't invert, but the lower voltage will
be the problem.
I've had a bit of a google, and I never see this - only a resistor from
+v to collector, but this will invert my signal - something I don't
want to do.
Ah. Okay. Then you probably need a second transistor, perhaps a PNP, to
reinvert it, again. A little more complexity.
I have had a line-level converter chip recommended to me - MAX3001E,
but this is only comes in very, very tiny TSSOP format, which would be
difficult to solder up, but I'm interested in the transistor solution
as this will help me to 'swat up' a bit on my A-level electronics.
Understood. It's about how I'd feel, too, I think. (TI and others do make ICs
for level shifting, which include two power pins for the purpose, in fact. But
doing it with BJTs means you can understand the basic ideas.)
As you already know, the inverter is:
5V
|
|
\
/ R2
\
|
+-----> out
|
R1 |/c
in >--/\/\----| Q1
|>e
|
|
gnd
The above circuit assumes that 'in' is an active, low impedance drive for both
0V and 1.5V and just uses Q1 as a saturated switch, more or less, allowing the
collector to get very close to the base voltage of 0V, or probably about .2V or
so. But that only happens when 'in' is at 1.5V and turns on Q1's switching
function. And when that happens, as you already know, 'out' gets very close to
0V, which is the opposite of what you want happening.
To invert the inverter:
5V
|
|
\ 5V
/ R2 |
\ |
| |<e
+----| Q2
| |\c
|/c |
in >----| Q1 +-----> out
|>e |
| \
\ / R3
/ R1 \
\ |
| |
gnd gnd
There are actually several different arrangements. One would look more like the
first case, with a base resistor like before for Q1. But this works, too, and
it does things a little differently. In this case, Q1's base is "tacked" hard
to the low-impedance drive and thus the emitter is forced to follow closely.
This impresses a voltage on R1 which allows you to calculate a fairly precise
current that you want to flow -- roughly a 'programmable constant current' that
is presented via the collector of Q1 and is driven through R2 and Q2's base.
Now, you could add another resistor to Q2's base, too, to allow the base to
'find it's place'. But if you are careful in designing R2 and R3, it's not
really necessary -- you just make sure that there is slightly more than enough
current to force Q2's base down adequately, when calculated through R2, and
allow enough margin to operate Q2's collector current via some modestly
predicted beta.
For example,
Q1 = 2N3904
Q2 = 2N3906
R3 = 47k (perhaps stiff enough for PIC inputs)
Now, you might decide to lower R3 to make it somewhat stiffer or raise it. What
you choose here will depend some on the loading that needs to be driven. But
PIC inputs (like most micro inputs) don't require more than 10uA and 5V across a
47k yields about 100uA from which 10uA won't hurt much. But read the data sheet
and make sure about this and set the expected current through R3 to be some 10X
over the worst case you have to deal with.
Okay, so to continue. When Q2 is 'on', we'll project that the beta will be
about 50 (normally, when V(CE) is a few volts the 2N3906 is often showing a beta
4-6 times this much beta, so we can expect a V(CE) of say 0.3V at a beta of 50,
I think -- but I'm guessing here.) This suggests that the voltage across the
47k is 4.7V for a collector current of 100uA.
With a collector current of 100uA and a guessed beta of about 50, the base
current needed will be 100uA/50 or about 2uA. So, let's plan to use 4uA drive
from Q1, doubling this estimate. We know that when Q1 is 'on', the emitter
voltage will be something circa 0.7V. But with such low currents (4uA) it will
probably be closer to more like 0.5V. So, let's guess at that number for now.
The emitter of Q1 will then be 0.5V less than the base, which we know to be
1.5V, so the emitter voltage will be 1.5V - 0.5V or 1.0V. We know that we want
about 4uA emitter current (this transistor's beta will be pretty high, so the
base current will be negligible) and thus, R1 = 1.0V/4uA or 250k.
Now, R2 will need to provide about 0.6V (another guess, I'm making) at 2uA (it's
'half' of the allotted 4uA.) So, this implies R2 = 0.6V / 2uA or 300k.
So, let's try:
R1 = 220k (a little more drive current, just in case)
R2 = 270k (to suck up just a little more of that drive current)
We have a design?!
5V
|
|
R2 \ 5V
270k / |
\ |
| |<e
+----| Q2
2N3904 | |\c 2N3906
|/c |
in >----| Q1 +-----> out
|>e |
| \
\ / R3
R1 / \ 47k
220k \ |
| |
gnd gnd
How does this simulate? Well, I get about 0V to 4.9V swings on the output,
given 0V to 1.5V swings on the input. And it looks pretty clean. Simulated
estimates are:
Q1 base current average of some 20pA with spikes on the transitions reaching as
much as 1.5uA (chances are, your drive to this circuit can handle that.) I(R1)
is more like 4.5uA instead of the 4uA we planned. But R1 is 220k instead of
250k, too. So we expected something extra here. I(R2) is about 2.2uA, instead
of the planned 2uA, but again we had adjusted it down a bit to suck up some
extra -- and it does. Base current on Q2 is about the same, 2.2uA (the
unaccounted for 0.1uA is actually just rounding errors I'm making.) Collector
current on Q2 is very close, too, at a bit less than 105uA.
In other words, it's seems to hold up.
But none of this takes care of speed issues. You didn't mention how fast your
logic and clock pulses may be.
If you want something with active drive HI and LO and that is faster, try
something along these lines:
R3 || 2200pF
,------------/\/\----||--------------,
| 470 || C2 |
| |
| 5V 5V |
| | | |
| | | |
| | 1N4148 | |
| \ D1 --- |
| / R1 / \ | 5V
| \ 22k --- | |
| / | | |
| | | | |
| | | | |<e Q2
| +-------------+------+-----| 2N3906
| | |\c
| 1.5V | |
| | |/c Q3 |
| '------| 2N3904 |
| |>e |
| | |
| | |
| ,-----+ +---> OUT
| | | |
| | \ |
| | / R2 |
| C1 --- \ 22k |
| 470pF --- / |
| | | |
| | | |
| | | R4 |/c Q1
IN >---++--------+-----+----------/\/\------+-----| 2N3904
| 10k | |>e
| | |
| C3 | |
| R5 || 1000pF | |
'-----------/\/\----||--------------' gnd
750 ||
In this case, R3+C2 as well as R5+C3 are "speed up" sections to help propagate
an edge forward. The rest is interesting to read through and get an eye to how
it works.
I haven't been careful about the designing the values here, because I've no idea
if you really care about something like this. Also, it again is an inverter and
you'd need to take some care about making this into a non-inverting circuit.
The point is mainly that for fast circuits you may need to do a little more than
something dead simple.
Jon