7 Transistors Triangle Wave Generator (650Khz)

[CDRIVE]

I just took a peek at the specs of your scope. I should have done that before but I didn't. It's a USB model with Input = 1Meg & 25pF. I didn't see any mention of 10x probes with it. Anyway, hang a 1M resistor across your cap in LT Spice to see what happens.

Chris

 

[iimagine]

Thank you all, for helping me analyzing/trouble-shooting my circuit

I just took a peek at the specs of your scope. I should have done that before but I didn't. It's a USB model with Input = 1Meg & 25pF. I didn't see any mention of 10x probes with it. Anyway, hang a 1M resistor across your cap in LT Spice to see what happens.

Chris

This model does come with a 10X probe with it, although I'm using 1X mode
1M across the cap in simulation did not have any effects on the waveform

 

[iimagine]

Well, I figure I should at least try to understand whats happening with my first circuit. Up on close inspection of the bottom waveform in simulator (setting R3/R4 to 470k/470k), and by probing the base of Q7, the time period when Q7's turns on and off is totally coincidental with when the non-linearity begins and end!? Although in simulation, this time period is short. Could it have something to do with Q7 using some current from Q3's collector, thus effecting its mirror Q4? I removed Q7's base from Q3's collector and give it it's own ref voltage using another voltage divider network, to my disappointment, the result waveform is the same. So what is happening here? Replacing R3/R4 back to 1Meg/1Meg seems to damped this effect down a lot but it is still there. I'm suspecting that in real world this is magnified much more, thus giving that result that i posted before.

PS: How the heck do I post a large image like kris?

 

[CDRIVE]

If I left click on your thumbnail I get an image that fills 2/3 of my screen. If I right click and open in a new tab I get an image that fills my entire screen. If I then click it again when the magnifying glass has a '+' in it it's so large that only 50% of the image can be seen without scrolling. I think it's large enough.

Chris

 

[CDRIVE]

Would one or both of you be kind enough to post your schematics only? I want to copy and paste the image into Tina, where I will create my own schematic. I want to sim them to see if my results are the same as yours.

Chris

 

[KrisBlueNZ]

Sure Chris. Here's iimagine's first design from post #1 on this thread. I've redrawn it so it makes more sense to me.

iimagine posted a revised version, which I'll call version 2, in post #10. I didn't do anything with this one.

Here's iimagine's third design, based on an emitter coupled Schmitt trigger with a constant current sink and switched current source, from post #18.

Version 1 runs at about 800 kHz (with a 1 nF capacitor) and this affects its performance. Version 3 was presented with a 100 nF capacitor and runs a lot slower. I would try simulating with the higher capacitance first. Ditto for prototyping, for that matter!

 

[iimagine]

Would one or both of you be kind enough to post your schematics only? I want to copy and paste the image into Tina, where I will create my own schematic. I want to sim them to see if my results are the same as yours.

Chris

KrisBlue beats me to it!

Would you be so kind to post your sim's result so we can all see if there are any differences?

 

[CDRIVE]

Kris, thanks for posting the schematic.

OK mates, here's my Tina results of iimagine's first circuit.

After running this I did plug in 100pF (probably excessive) between various nodes. As expected some had little to no effect while others certainly destroyed the linearity.

I would also like to run this with each transistor's beta matching iimagine's real world model. It would also be interesting to see in-circuit capacitance measurements of various protoboard nodes.

Chris

 

[KrisBlueNZ]

OK, that looks alright doesn't it.

iimagine, when you prototyped your first circuit, what type of transistors did you use for the current mirrors? I don't expect that the distortion was caused by thermal mismatch; just curious.

Also how did you construct the prototype? On breadboard? If so, would you like to rebuild it using stripboard instead?

I would say that you should just go with the version 3 design, but the charge current is far from constant.

Actually I just looked at the capacitor current for the version 1 design and it is not clean either, especially during discharge. The current at the capacitor drops from 1.71 mA to 1.61 mA during the discharge time, especially at the end of the discharge. This seems to coincide with the change in the path of the discharge current from Q6's base to Q7's collector as Q7 begins to conduct around 3/4 of the way through the discharge period.

I suspect if you want a triangle wave with straight sides you will need to redesign the circuit to use a smaller range of capacitor voltages, centred around half supply, so the current sources and sinks will be operating far from saturation. Probably a higher supply voltage would help too.

I'm going to have a play around and see if I can come up with something better. Don't hold your breath! I guess there's a reason why the two-op-amp integrator-Schmitt oscillator is normally used!

 

[KrisBlueNZ]

Well, I've had a quick try to come up with a design that works better, with some success, but it's not much good at high frequencies. It's similar to design 3, with a 1 mA current sink that runs all the time and a 2 mA source that's gated. The capacitor is buffered by an emitter follower with a voltage divider in the emitter (to increase the swing at the capacitor), feeding a two-transistor emitter-coupled Schmitt trigger that enables or disables the current source. Seven transistors and nine resistors.

Even with these changes, the capacitor current tapers from about 1.024 mA to about 1.021 mA during the charge time, and from 1.032 mA to 1.030 mA (negative) during the discharge time, with a spike just before each changeover. And that's just at 10 kHz (with a 10 nF capacitor).

It's been an interesting thread but I suspect it's run its course - for me at least.

 

[iimagine]

I am soooo happy today!
Good news! A member from another forum decided to build and test out my first and third circuits and the result waveform that they get were beautiful, just like what the sim predicted!
Although the 3rd version waveform is nowhere near as nice as the first. I dont know if I am allowed to post his results here, If so, I would asked him for his permission.

So there have been problems with my model all along. I will rebuild it carefully

PS: These are the components value that he used:

'I use breadboard and some european BJT.'
Q1/Q2 = BC557B
Q3/Q4 = BC337-40
Q5/Q6/Q7 = BC548B
R3 = 2x470K; R4 = 680KΩ; R1 = 47KΩ; R2 = 10KΩ; C1 = 1nF;

 

[iimagine]

First of all, I still havent rebuild my first circuit yet, as I have not the time to do so. Right now, I'm only trying to find a way to produce true linearity for my fist circuit. I like discrete stuffs, I am learning so much more about transistors this way.

Anyway here is what I came up with: Version 4

1. No more current mirrors!
2. Sharp square wave to trigger current source.
3. Added current sense transistor Q2 to monitor and correct Q5's base current
4. Added schottky diode across Q6's base and collector to prevent it from saturating (This solved the problem of non-linear discharging)

I think I've nailed it! Although at higher frequency, changing cap to 1nF, distortion begins to show, might have to shove a little more current into it.

Anyway, thats it for now. Thanks to all who have been following this thread, and to KrisBluesNZ + CDRIVE who have been responding and thus providing encouragement to further explore

As always, please provide feedback!

 

[CDRIVE]

I think I've nailed it! Although at higher frequency, changing cap to 1nF, distortion begins to show, might have to shove a little more current into it.

That's not surprising. The higher the freq the lower all R values have to be for non static portions of the circuit. Yes, this translates into increased current.

Chris

 

[iimagine]

I finally assembled my version 4 together on a breadboard, using same transistors from version 1, other components value are exactly the same as on the schematic, only exception is R4, it is now changed to 220k and since I didnt have a BAT54 handy, it was omitted.

Worked on the first try!

Here is the result:

Edit: C1 = 1nF

 

[iimagine]

Non-linearity still exists when discharging C1 via Q6 base. If I substitute R3/R4 with a constant current source, this will limits Q6 Ic at a constant rate, thus its Ib will remain at a constant rate, this would work nicely at lower freq, but I cant seem to get rid of the current spike (red). While I understand that, this is due to voltage not develop fast enough at Q5's base when Q6 turns off, the reason for this is still unclear to me , increasing current source helps, but will slow down the discharging rate.

Anyone have any suggestion?
Is there a trick to keep Q6's Ic constant without the use of a current source?

Blue line - Q6's base
Red line - current in and out of C1

 

[iimagine]

Here is my latest work, version 6.

50% reduction in power consumption!

This is an overall improvement over all previous version, I think i'm going to stick with this new method of discharging, and charging the cap. In this version, CCS (constant current source) are all being used as reference currents to be amplified at the charge and discharge states, therefore, power consumption being used by these are only a few µA. There are still distortions to be corrected but I'm quite happy with it now.

Please help me finish this, I'm getting a little bored doing it by myself