Refer to the IBM Technical Reference manual, First Edition (August 1981).
If that's what it says it disagrees with all the actual 'PC compatible'
hardware I've programmed. (which admittedly does not include IBM brand
machines of that vintage)
Both features are controlled by the programmable interval timer chip,
and it's possible to load the counter registers and adjust the limit
registers of this chip to arrange control the phase and frequency of
the refresh, (or turn them off)
The tick is generated by the 8253 PIT (Programmable Interval Timer)
the signal from there it goes via the IRQ0 line to the 8259 PIC
(Programmable Interrupt Controller) which is configured by the
BIOS to produce to intterupt number 0x0A when signaled on that
input. the timer can also be masked at the PIC.
and since the PIC generates maskable interrupts setting the interrupt
flag in the processor will mask it too.
I see now (perusing ports.lst in "Ralf Browns interrupt list" that there
was an NMI connection ob some systems too, as far as I know it was only
used as a watchdog timer.
Brown's list also has the following to say about the NMI.
..--------H-02---------------------------------
..INT 02 - external hardware - NON-MASKABLE INTERRUPT
..Desc: generated by the CPU when the input to the NMI pin is asserted
..Notes: return address points to start of interrupted instruction on 80286+
.. on the 80286+, further NMIs are disabled until the next IRET
.. instruction, but one additional NMI is remembered by the hardware
.. and will be serviced after the IRET instruction reenables NMIs
.. maskable interrupts may interrupt the NMI handler if interrupts are
.. enabled
.. although the Intel documentation states that this interrupt is
.. typically used for power-failure procedures, it has many other uses
.. on IBM-compatible machines:
.. Memory parity error: all except Jr, CONV, and some machines
.. without memory parity
.. Breakout switch on hardware debuggers
.. Coprocessor interrupt: all except Jr and CONV
.. Keyboard interrupt: Jr, CONV
.. I/O channel check: CONV, PS50+
.. Disk-controller power-on request: CONV
.. System suspend: CONV
.. Real-time clock: CONV
.. System watch-dog timer, time-out interrupt: PS50+
.. DMA timer time-out interrupt: PS50+
.. Low battery: HP 95LX
.. Module pulled: HP 95LX
..----------------------------------------------
With the exception of oddball hardware like the PC-Jr, PC-Convertible,
MicroChannel Architectiure PS/2s, the HP 95LX, and debugging cards (like
"periscope") the NMI was only triggered by the coprocessor or a parity
error.
Bye.
Jasen
