R-2R ladder tolerances?

From time to time I think about building an R-2R ladder and drive
it with some HCMOS buffer chip, and was wondering about resistor
tolerances. It seems like the cumulative error using 1% resistors
would max out at about 2%, wouldn't it? And even if you used wide-
tolerance resistors, say, 10% or even 20% (there used to be such
things) yes, it could be all over the map, but would it still
be monotonic? The error of each lower bit is halved (isn't it?),
so even if one is +20% and the rest are -20%, - hmm. Can anybody
do this in their head? Would the transition from 01111111 to 10000000
go upside-down?

Just wondering...

Thanks!
Rich