PCI bus

[[email protected]]

I have some custom PC boards that years ago, I redesigned from the ISA to PCI
interface via custom PLX chips. They have always performed with no problems,
but the customer PCs were a bit behind the curve, and all ran with sub
gigahertz CPUs.

When I try to use them in MBs with CPUs exceeding 1.2GHz, the PC won't boot
with those same cards installed in the PCI slot. I suppose I also may be
having an issue in that the newer boards are using AMD processors rather than
Intel Pentiums.

Before providing tons of what may be useless information, can anyone vouch for
any information or theories that the PCI slot timing is changing as the CPU
speeds increase? I am of the impression that a PCI slot is a PCI slot, and
that it is standardized, but that is not what I am seeing, so I am just asking
in a general sense if there is a known issue here before I get in over my
head.

Much obliged for an insight or ideas.

Thanks,

Mark

 

[PaulCsouls]

The PCI bus is spec'd to be 33MHZ or 66MHz for 66MHz PCI, but on some
older motherboards the PCI clock is generated as a percentage of the
front side bus. If you install a new CPU and change the jumpers
settings for the FSB to increase the speed of the processor you will
increase the speed of the PCI bus. My computer is over clocked to
generate a 75MHz FSB and a 37MHz PCI bus for a 450MHz AMD K6-2. My PCI
bus runs just fine at 37MHz. If I increase the bus to 83MHz to get
500MHz out of my microprocessor, the 41MHz PCI bus will lock up my
computer.

Paul

 

[Iwo Mergler]

I have some custom PC boards that years ago, I redesigned from the ISA to PCI
interface via custom PLX chips. They have always performed with no problems,
but the customer PCs were a bit behind the curve, and all ran with sub
gigahertz CPUs.

When I try to use them in MBs with CPUs exceeding 1.2GHz, the PC won't boot
with those same cards installed in the PCI slot. I suppose I also may be
having an issue in that the newer boards are using AMD processors rather than
Intel Pentiums.

Before providing tons of what may be useless information, can anyone vouch for
any information or theories that the PCI slot timing is changing as the CPU
speeds increase? I am of the impression that a PCI slot is a PCI slot, and
that it is standardized, but that is not what I am seeing, so I am just asking
in a general sense if there is a known issue here before I get in over my
head.

Much obliged for an insight or ideas.

Thanks,

Mark

Since the PCI timing is subject to a standard, there should be
no change. Paul is right, of course, the PC may violate the
standard, depending on clock settings.

Even without actually violating the standard, modern mainboards
may be less forgiving if your card 'stretches' the standard a
little. I would re-check the layout. In a nutshell - min. 4-layer
board, solid power planes, PCI traces less than 1 inch, clock
trace 1.5 inch, only one cmos input/driver per signal.

Another thing that comes to mind is power. If the card causes
a large current surge at startup, it could push an already
struggling power supply over the edge.

Kind regards,

Iwo

 

[Keith Williams]

Since the PCI timing is subject to a standard, there should be
no change. Paul is right, of course, the PC may violate the
standard, depending on clock settings.

Also, PCI may be anything *below* 33MHz. The old system may have had
an under clocked PCI. Paul mentioned that his 75MHz FSB machine over
clocked the PCI bus. The other alternative was to under clock the PCI
bus by dividing the FSB by three (25MHz, in this case). Others used an
asynchronous PCI bus at 32MHz and divided that by 4 to the 8MHz ISA bus
(others over-clocked the ISA bus slightly).

Even without actually violating the standard, modern mainboards
may be less forgiving if your card 'stretches' the standard a
little. I would re-check the layout. In a nutshell - min. 4-layer
board, solid power planes, PCI traces less than 1 inch, clock
trace 1.5 inch, only one cmos input/driver per signal.

I believe the spec on the clock trace is 2.5" +/- .1". ...at least
that's what Shanley and Anderson say. I'd have to look for my copy of
the spec. I've gotten away with violating this spec before (oops), but
it's someplace to look.

Another thing that comes to mind is power. If the card causes
a large current surge at startup, it could push an already
struggling power supply over the edge.

I'd think the newer systems would be more forgiving here, but it's a
good thought too.

 

[Nico Coesel]

I have some custom PC boards that years ago, I redesigned from the ISA to PCI
interface via custom PLX chips. They have always performed with no problems,
but the customer PCs were a bit behind the curve, and all ran with sub
gigahertz CPUs.

When I try to use them in MBs with CPUs exceeding 1.2GHz, the PC won't boot
with those same cards installed in the PCI slot. I suppose I also may be
having an issue in that the newer boards are using AMD processors rather than
Intel Pentiums.

I don't think the type of CPU has much to do with it (altough I highly
recommend using Intel CPU's in servers / industrial applications
because they have more thermal headroom and therefore are more
reliable). The non-Intel chip set may be the problem.

On the other hand, the newer PCI buses require stricter timing.
Although they claim these buses to be compatible with PCI 2.1, they
aren't. I've had similar problems with the Xilinx PCI core. When I
upgraded to the latest core, the problems where over.

 

[SioL]

[email protected] wrote:

I don't think the type of CPU has much to do with it (altough I highly
recommend using Intel CPU's in servers / industrial applications
because they have more thermal headroom and therefore are more
reliable).

Compare power ratings of Athlon 64 with the latest generation of P4 (Prescott)
or the other P4 high end parts. You might be surprised.

SioL

 

[Nico Coesel]

Compare power ratings of Athlon 64 with the latest generation of P4 (Prescott)
or the other P4 high end parts. You might be surprised.

Do the thermal math on the packages and you'll find the AMD packages
allow the die to get hotter than Intel's packages while being within
operational specification. In other words: AMD CPU's are like a tuned
race engine. You can drive very fast with it, but it won't last very
long. Besides, Intel has already shown they design towards reliability
by adding over heating protection into the P3 (and P4) long before AMD
thought of doing that.

 

[Pooh Bear]

Do the thermal math on the packages and you'll find the AMD packages
allow the die to get hotter than Intel's packages while being within
operational specification. In other words: AMD CPU's are like a tuned
race engine. You can drive very fast with it, but it won't last very
long. Besides, Intel has already shown they design towards reliability
by adding over heating protection into the P3 (and P4) long before AMD
thought of doing that.

How does that affect the operation of the PCI bus exactly ?


Graham

 

[SioL]

Do the thermal math on the packages and you'll find the AMD packages
allow the die to get hotter than Intel's packages while being within
operational specification. In other words: AMD CPU's are like a tuned
race engine. You can drive very fast with it, but it won't last very
long. Besides, Intel has already shown they design towards reliability
by adding over heating protection into the P3 (and P4) long before AMD
thought of doing that.

Are you talking about the old Athlon regular version without the metal
heat spreader with the practically exposed die?

Anyway, AMD now has that power down diode included. And I've
never heard of a person with that kind of a failure on AMD or Intel.

Any decent server board will detect a failed fan and shut down the pc anyway.

It seems to me that today any processor becomes obsolete long before its
life span is exceeded.

Plus, Athlon64 has that buffer overrun protection supported in WinXp sp2,
which Intel won't have for some time to come.

Not to mention that Intel was forced to go AMD's route with the 64 bit.

Right now I don't see any reason to buy a slower & more expensive part
from Intel. Even the chipsets have matured.

SioL

 

[[email protected]]

Thanks to all who provided me some insight into dealing with the PCI bus
problems. I appreciate the assists.

I hope its merely a case of a BIOS setting for timing and not a need for
rethinking the design. <shrug> Guess I will find out soon enough. Seems
strange that it would cause the PC not to boot if it was just a timing thing,
but I am hoping for the easier solution.

Much obliged for your time.

 

[MM]

Which PLX chip are you using? I have designed quite a few PCI cards and I am
100% sure that the CPU speed has nothing to do with this (assuming no weird
reclocking has been done). How does it not boot? Where does it stop? Do you
get BSOD or what? I assume your card is a 5V card. Make sure that the 3.3V
power pins are not shorted to anything. In the older PCs they frequently
were not used, but since PCI 2.2 it is a requirement, so all the new
machines supply it to the slots... Can you dump the PCI configuration space
of your card on a PC where it works? That might help to diagnose the
problem.

/Mikhail

 

[[email protected]]

Which PLX chip are you using? I have designed quite a few PCI cards and I am
100% sure that the CPU speed has nothing to do with this (assuming no weird
reclocking has been done). How does it not boot? Where does it stop? Do you
get BSOD or what? I assume your card is a 5V card. Make sure that the 3.3V
power pins are not shorted to anything. In the older PCs they frequently were
not used, but since PCI 2.2 it is a requirement, so all the new machines
supply it to the slots...

Mikhail,

I am going to visit the company next week and see what is going on. I will
certainly check into what you have mentioned, and if you don't mind I will
get back to you with the info on what happens at bootup, as I have not
actually seen the problem yet.

The PLX chip is the 9050, and thanks for the advice about the power supply
lines. I will certainly check on that as well.

Can you dump the PCI configuration space of your
card on a PC where it works? That might help to diagnose the problem.

I must confess that I am not sure what you are referring to here. Can you
clarify it for me?

Thanks for your time and assistance.

Mark

 

[MM]

I must confess that I am not sure what you are referring to here. Can you
clarify it for me?

Mark,

PCI spec requires every PCI device to implement certain registers, where
information about the device is stored. When the system boots it scans the
PCI bus and reads the configuration space of each device it found. Based on
this information it assigns system resources to the devices, such as memory
space, I/O space, interrupts and DMA channels. Sometimes the system might
crash if it finds a device that requires too much resources, although it is
supposed to come out of this situation more gracefully by disabling the
offending card. On your card, do you have an EEPROM to configure the PLX
chip or are you relying on its default configuration? If the latter then
there is not much point in dumping the configuration data, since PLX default
is fine, but if the former then you should look at this data closely. There
are a few utilities that you can find online that allow to scan PCI devices.
Some of them can dump the whole space into a file... I don't have any links
but try googling... Also try going to www.pcisig.org website, they used to
have a collection of links to this kind of stuff. PLX used to give away a
utility. My favorite has been PciView from BlueWater Systems. It seems to be
hard to find these days since this company doesn't exist anymore, but I can
send it to you on Monday if you want. The version I have doesn't do file
dump but will let you see the full configuration space.

/Mikhail

 

[PaulCsouls]

I must confess that I am not sure what you are referring to here. Can you
clarify it for me?

PCI
configuration mechanism #1
BIOS major version 2
BIOS minor version 16
Last PCI bus in system 1

PLX9054 device found
Class: 6 SubClass:80 Program IF: 0
Bridge Devices: Other
Device ID:9054 Vendor ID:10b5
Sub System ID:9054 Sub Vendor ID:10b5
Device Number: f Function Number: 0
Bus Number: 0 Index: 1
Status:290 Command:117
PCI IO
PCI memory
Bus master
Memory write and Invalidate
SERR enabled
New Capabilities List
Fast Back to Back
Device Select Timing: Medium
BIST: 0 HDR: 0 Latency:40 Cache Line Size: 8
Base Address 0: febeef00
Memory Lower 4GB
Size 256 Address febeef00
Base Address 1: e401
I/O Size 1024 Address e400
Base Address 2: febed000
Memory Lower 4GB
Size 4096 Address febed000
Base Address 3: febe8000
Memory Lower 4GB
Size 32768 Address febe8000
Base Address 4: 0
Base Address 5: 0
CardBus CIS Pointer: 0
Expansion ROM Base Address: 0
Capabilities Pointer: 40
Capabilities Register 0: 14801
PCI Power Management Interface
Capabilities Register 1: 804c06
CompactPCI Hot Swap
Capabilities Register 2: 3
Vital Product Data
Max_Lat: 0 Min_Gnt: 0
Interrupt Pin: 1 Interrupt Line: 9

Size 256 Address febeef00 Selector 0 cf
Size 1024 Address e400 Selector 1 d7
Size 4096 Address febed000 Selector 2 df
Size 32768 Address febe8000 Selector 3 e7
DMA 0 Local Bus Width 16
DMA 0 Wait States 0
READYN enabled
Local Burst enabled
Local Address Bus Constant
Demand Mode enabled
Slow Terminate Mode
DMA 0 PCI Address 1f80000
DMA 0 Local Address 0
DMA 0 Transfer Size ff
DMA 0 Descriptor Pointer b
Mode DMA Arbitration 280000
DMA Threshold 1111
DMA DAC 0
Interrupt control status f010180

DMA Config 80: 1941
DMA Config 84: 1f80000
DMA Config 88: 0
DMA Config 8c: ff
DMA Config 90: b
DMA Config 94: 43
DMA Config 98: 0
DMA Config 9c: 0
DMA Config a0: 0
DMA Config a4: 0
DMA Config a8: 1010
DMA Config ac: 280000
DMA Config b0: 1111
DMA Config b4: 0
DMA Config b8: 0

I have some DJGPP code that does this but it in only works in DOS or
Win95-98. You can probably find a more up-to-date utility if you hunt
around. I think the PLX debug utility will do it.

Paulc

 

[Dana Raymond]

I have read this thread, and agree with much of the good advice (CPU deson't
matter, cpu overclocking can race PCI bus depending on chipset, shorted vio
and other power lines, etc.)

My first question is: To what spec did you design the PCI card?
From there I would see the differences.

One thing you should check for is your card edge keying. Also, does the MB
key for 5V and 3.3V, or only one? That keying is what prevents older PCI (5V
only) cards from being plugged into newer MBs.

I am a little concerned that the card isn't multilayer! You usually need a
GND plane to maintain the proper impedance on the signalling lines (return
path on GND layer).

Keep in mind that the PCI spec only allows for so many 'loads'. Each
connector counts as 1 load and another load for the card plugged into it.
But, a lot of MBs have on-board PCI devices that count for only 1 load.

Please, start with your card keying, the PCI keying on the MBs that work and
those that don't, and confirm that its not likely a PCI clock frequency
thing. You can check the PCI clock with a scope or counter - its not
reflective. We can go from there.

Oh yes, I would definately try modding a card and holding the PLX in reset.
That will tell us if the problem is purly electrical or if there is a bus
confic problem , or the PLX is programmed for FAST response and the MB's
can't handle that, etc.

Mark... If you like I can take a quick courtesy look at your schematics and
layout if provided in PDF format (I have orcad and pads but PDF means I
can't modify the design!). I worked on the PCI bus on AMD's Athlon and
Athlon64/Opteron reference design MBs. (And I have seen people try to get
away without supporting the spec correctly when it comes to the power
pins/keying/etc.

Dana

 

[keith]

On Thu, 09 Sep 2004 10:34:01 +0000, Dana Raymond wrote:

Keep in mind that the PCI spec only allows for so many 'loads'. Each
connector counts as 1 load and another load for the card plugged into it.
But, a lot of MBs have on-board PCI devices that count for only 1 load.

This isn't strictly true. There is an example in the spec for
"loads" (each chip being one and each connector one, giving two for a card
plugged into the bus), but the spec doesn't use these for anything other
than an example. The timings are the critical specifications. If you can
meet the timings, you can load the bus more heavily.