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Mosfet driver for POWER MOSFET SPW47N60C3

Discussion in 'Electronic Design' started by Zdenko, Jul 15, 2003.

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  1. Zdenko

    Zdenko Guest

    Dear People,

    can anyone help me with this problem?

    I need to drive a Power mosfet for 600V, 47 A and it have cca 12 nF
    input capacitance.

    Switching frequency should be a 200khz and with very small rise and
    fall time (cca 50 ns). Everything is on high side driver and should be
    very fast. I will use appropiate optocoupler if its for low side
    driver too.

    Can you give me a right sign for driver?



    Mobile for quick sms:+385 91 5012417
  2. Zdenko wrote...
    To evaluate switching speed it's Qgd that matters, more than Ciss.
    Qgd is often called the Miller gate-to-drain charge, because it's
    the gate charge required as the MOSFET's drain voltage swings from
    fully on to off (or back). This corresponds to figure 11 in the
    data sheet, and is specified as 121nC typical, which is not bad for
    a 415W high-voltage FET. APT's version of the same part highlights
    "Low Miller Capacitance" on the front page of the data sheet.

    The charge formula tells us you'll need i = Q/t = 121/50 = 2.4A
    of gate drive to switch this part in 50ns. I keep an assortment
    of FET driver chips to handle different size FETs. For example,
    the TC4427 is a dual driver rated at 1.5A, the TC4424 is a 3A
    dual and the TC4420 is a single 6A driver. But I'd recommend
    the 6A part for your big FET. I'd use a small say 1.5-ohm gate
    resistor and I'd keep the FET-driver to gate leads very short.
    Keep the return path from the source to the driver GND pin short
    and immediately parallel to the gate lead to minimize inductance.
    The same holds for the 0.1uF ceramic cap bypassing the driver IC.

    I'd start my testing at low voltages and without much load. I'd
    evaluate the gate and source voltages during switching to check
    the quality of my low-inductance FET-druve wiring. For example,
    I'd run the high-side FET with its opto-coupler, but without the
    400V on it's drain, and without the low-side switch. In fact I'd
    ground the FET's source (to keep gate and source voltages within
    range for my scope) and I'd use a temporary resistive load to HV.
    I'd pulse the FET on for short pulses (to avoid overheating the
    resistor) and carefully scope the lead-inductance spikes, which
    will grow higher as the load current is increased. Finally I'd
    use an inductive load to evaluate high-current turn-off spikes.
    Be careful to maintain enough time delay between turning one FET
    off and the other one on! We don't want any high shoot-through
    currents at 600V.

    - Win
  3. On 15 Jul 2003 04:05:12 -0700, the renowned Winfield Hill

    Win, I wonder if it's time to start using 1uF caps for this sort of
    thing? I happened into a bunch of reels of SMT parts, one of them was
    4,000 0805 caps of 1uF/16V- and I notice they are not expensive at all
    by the reel, less than 3 cents each. 50nsec * 6A/0.1uF = 3V.

    Best regards,
    Spehro Pefhany
  4. Spehro wrote...
    Hey, what we need is part numbers and ordering addresses!

    With the 1.5-ohm resistor, I had in mind gate currents closer to
    3A... But the relevant issue is supplying the gate charge. For
    a 0.1uF cap this works out to a q/C = 121nC/100nF = 1.2V change
    during the 50ns drain swing. The spw47n60's total gate charge
    is spec'd at 320nC max at dVgs = 10V, which would drop the puny
    cap 3.2V for the entire gate event. Another relevant issue is
    the capacitor's esr, which could cause the driver to suffer badly
    during a 3A pulse. Yep, it appears that 0.1uF is too small.

    - Win
  5. Panasonic ECJ-2VF1C105Z Y5V are 2.5 cents each 1uF/16V @4K quantity.
    The price quadruples if you need 25V in 0805, but in 1206 less than
    I don't see an ESR spec for the series: data/ECJ Series.pdf

    Best regards,
    Spehro Pefhany
  6. What's the intended application, actually?
  7. Not bad! 10uF/22uF is getting up there. For very low consumption
    circuits, a handful in parallel could even be considered for mains
    frequency filtering in special circumstances (low height, long life at
    high temperature, cost not very important).

    OTOH, they might be low enough ESR to cause stability problems with
    some linear regulators if used on the output.

    Best regards,
    Spehro Pefhany
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