Hello, Some days ago I entered one post asking for help in one ESR plan I was doing, but thanks to your advise I have quited that plan, since it was very difficult to implement the way I was thinking in it. So I have been googling to see if there is any circuit available to test ESR capacitors incircuit with 2 requirements: It must reject reactance working with one frequency of 100 KHz It must have the possibility to test if a low ESR is only that or if the cap is leaky. So I found this circuit: http://www.google.pt/url?sa=t&rct=j...VwtE7_fFATwswpsDD9J36vw&bvm=bv.80120444,d.d2s I need some advise before going on: Does anyone can say to me what voltage will be at the leads with them open? (to see if I really can test incircuit) Whith one resistor of 10Ω connected to the test leads, what will be the voltage at the output of IC4.B? I have noticed that the decimal point on display is configured in a way that we will have only one decimal place (010.0). Instead of connecting pin 4 of IC6.B to pin 16 on display, if i'll connect it to the pin 12 of the display, Is it possible to regulate the voltage that I asked on point 2 using P1 to achieve the measure of 10.00? I would also like to ask one general opinion about this circuit. Thank you guys. All the help is welcome!