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about the arrow direction of bulk of pmos and nmos

Discussion in 'Electronic Basics' started by jason, Feb 1, 2006.

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  1. jason

    jason Guest

    Hi All

    I would like to confirm with you all if the arrow convetion of the bulk
    for pmos and nmos is the flow direction of electron?
    Kindly comment
    Thank you so much


    best regards
    Jason
     
  2. BobG

    BobG Guest

    "The arrow points North"
     
  3. Guest

    Guest Guest

    : Hi All

    : I would like to confirm with you all if the arrow convetion of the bulk
    : for pmos and nmos is the flow direction of electron?
    : Kindly comment
    : Thank you so much

    No.

    In an NMOS, the arrow points toward the gate. In a PMOS, the
    arrow points away from the gate.

    This has nothing to do with electron flow. In addition there
    generally isn't much current (or electrons, by your convention) flowing
    through the bulk, at least not more than very locally, as the
    bulk-to-source and bulk-to-drain junctions are generally reverse-biased.
    There is not generally any gate-to-bulk (or vice-versa) electron flow,
    either, except, perhaps in the weak-inversion region of operation. In
    strong inversion, there is an inversion channel between the gate and the
    bulk, so the current would flow from gate-to-channel instead of
    gate-to-bulk.

    That probably more-than-answers your question...

    Joe
     
  4. jason

    jason Guest

    Hi Joe

    Thank you so much for giving the opinion and sharing the wonderful
    idea.
    That was my initial thought. But I went thinking that there could be
    more before one adopts any convention.

    Nmos if has body effect, meaning the Vsource is higher than Vbulk,
    therefore there could be current flowing to the bulk. Since the arrow
    is pointing to the gate for Nmos, then it might be saying the electron
    is flowing from bulk to source.

    That was a guess with some logic isn't it?

    Thank you Joe for sharing the knowledge.

    best regards
    Jason
     
  5. John  Larkin

    John Larkin Guest


    The conventional power fet symbol is a mess. We draw fets that look
    like regular NPN or PNP transistors, but we add the insulated gates.
    It's easier to resolve and far more intuitive.



    |
    |
    |
    |
    |
    |_|
    | |
    -----| |
    | |
    |>
    |
    |
    |


    John
     
  6. Guest

    Guest Guest

    : Hi Joe

    : Thank you so much for giving the opinion and sharing the wonderful
    : idea.
    : That was my initial thought. But I went thinking that there could be
    : more before one adopts any convention.

    : Nmos if has body effect, meaning the Vsource is higher than Vbulk,
    : therefore there could be current flowing to the bulk. Since the arrow
    : is pointing to the gate for Nmos, then it might be saying the electron
    : is flowing from bulk to source.

    : That was a guess with some logic isn't it?

    Hey Jason,

    Actually, in an NMOS with body effect, there is still not really
    any chance of current flowing from source to bulk. I had to draw this out
    to re-confirm, but an NMOS has a bulk made out of p-type material, and
    source/drain made out of n-type material. The source end of the
    source-to-bulk junction (diode) is the CATHODE of the diode, while the
    bulk end is the ANODE. If the source (cathode) of that diode is at
    a higher voltage than the bulk (anode) the source-to-bulk junction is
    reverse biased, and no significant current will from from source-to-bulk
    or vice versa.

    Forward-biasing either the source-to-bulk or drain-to-bulk
    junctions is REALLY BAD, and can lead to latchup. Therefore, that is why
    the bulk voltage is picked to be the smallest possible voltage (for the
    bulk of NMOS devices, or p-type bulk) and why it is picked to be the
    largest possible voltage for the bulk of PMOS devices, which have n-type
    bulk.

    Hope that helped explain that.....

    Joe
     
  7. jason

    jason Guest

    Hi Larkin

    Thank you for explaining and giving the confirmation after Joe. It is
    very kind of you to explain and took the effort to draw the nice
    looking Nmos. :)

    Joe,
    You are very right about the reverse biased diode which I almnost for
    got haha
    You explained in a very detailed sentences.
    So in the end , I may think that the arrow is just showing :
    1) direction of initial electron flow to the gate to form electron
    sheet charge (NMOS). Therefore pointing into the gate
    2) direction of initial electron deplete the area near to the gate for
    PMOS (leaving the gate surface)

    What do you think?
    That is just some guess to help one to rememebr :)

    Thank you all for your comments
    Thank you Joe and John Larkin

    best regards
    Jason
     
  8. John Larkin wrote...
    It's a mess allright. That symbol conflicts awkwardly with the
    appointed symbol, with it's substrate diode going the other way.

    .. |
    .. |__|
    .. | |
    .. -----| |<-,
    .. | | |
    .. |--+ N type
    .. |
    .. |

    And then we have these symbols, for N and P type.

    .. N | P |
    .. |--' |--'
    .. --| --o|
    .. |--, |--,
    .. | |

    And we have these symbols, where it's understood what polarity
    you're to assume, N or P type.

    .. N | P |
    .. __|--' __|--'
    .. |--, |--,
    .. | |

    Some solve this by using gate position to indicate the source,

    .. N | __ P |
    .. |--' ||--'
    .. __||--, |--,
    .. | |

    There's more...
     
  9. John  Larkin

    John Larkin Guest

    *I* appoint the symbols. Mine looks like, and behaves like, an NPN
    transistor with an insulated gate. I don't have to show the substrate
    diode any more than an NPN has to show the b-e zener.
    But the substrate diode is source-to-drain, not halfway up, and it's
    unaffected by the gate. And there are just too many bits and pieces
    for this version to look right on a well-proportioned schematic.

    John
     
  10. John Larkin wrote...
    That's so, it is complicated, and if the (redundant) drain-source
    substrate diode is explicitly shown, as some like to do, especially
    for certain relevant circuits, it becomes a very complex symbol.

    Your simple MOSFET symbol has sufficient use that most anyone seeing
    it on your schematics will know what's meant. Go in peace my son.
     
  11. John  Larkin

    John Larkin Guest

    Blessings on you, and all your schematics, as well.

    Another homemade symbol I like is the one we use for Schottky
    diodes...


    |\ |
    | \ |
    | \ |
    -------------| . \|--------------
    | /|
    | / |
    | / |



    where the little dot in the middle is the hot carrier.


    John
     
  12. jason

    jason Guest

    Hi Winfield and Larkin

    Thank you so much for the posting.
    Winfield , you have been drawing so many circuits. I was wondering if
    those are true ones.
    Then was told by somebody you are a author of a 5-star electronics
    book. I am sure you must be giving some value-added circuit.
    I will digest it. So when will you publish the book?

    Thank you all.

    best regards
     
  13. John  Larkin

    John Larkin Guest

    Win co-authored "The Art of Electronics", which everyone should have.
    The second edition is still in print, and he has been promising a
    third for, um, a while now.

    His circuits are, to my knowledge, always correct, if a tad complex
    and fussy at times. But that happens when people treat electronics as
    art and sport.

    John
     
  14. jason

    jason Guest

    Hi John

    Thank you for the info given.
    Look forward to Win's new book then.

    Thank you all for writing to this post
    :)

    best regards
    Jason
     
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