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Recent content by slvr00gt

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    Controlling 3v-5v level shifter nxp 74LVC4245A

    First image shows the DATA7(5V) and 1_DATA7(3V) read out from J1 header. 1_DATA7 is noisy one. Second image shows 1_DATA7(3v) on the top with the droop. It is read out from the same header. Second image was taken after I tied high DIR signal of U26 while keeping OE# connected in the...
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    Controlling 3v-5v level shifter nxp 74LVC4245A

    FeRAM is 3v device. It is the reason for 74LVC4245 chip. I have voltage regulator for FeRam to produce 3v from 5v input. Entire interface between processor and FeRAm is level shifted, address, data, control and all. Address and control are unidirectional, going through different chip. l and...
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    Controlling 3v-5v level shifter nxp 74LVC4245A

    Thanks for suggestions! Originally, I had controls on 3.3V. I moved them to 5V rail and result is the same. I tried to play with resister, but resulting signal looked like sine wave instead of the normal pulse. It didn't help. Spec below doesn't specify the reference voltage for the...
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    Controlling 3v-5v level shifter nxp 74LVC4245A

    I am working on a memory card that uses 3.3v FeRam(FM28V100-TG) in place of 5v sram. I got the card to work, except that I get large amount of data corruption. After tracing the problem with the scope I narrowed it down to data writes. Whenever 5v side is driving 3v side I getting very...
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