ucc3895 phase-shift resonant PWM controller

[Winfield Hill]

Some years ago Unitrode, now TI, introduced the uc3875
phase-shift resonant PWM controller. Four years ago
they introduced an advanced cmos version, the ucc3895.
This IC can run up to 1MHz and is well suited to high-
power zero-voltage-transition dc-dc converters.

I'm using a '3895 with my favorite Intersil HIP4081 to
drive four MOSFETs in a 600W H-bridge at 300 and 600kHz
to energize a resonant high-voltage (10kV) transformer.
The intended frequency is crystal derived, so I'm trying
to synchronize the '3895 as described in the data sheet,
http://focus.ti.com/docs/prod/folders/print/ucc3895.html
via the SYNC pin. Although this pin is an output, it's
a "weak" one with 400uA drive and 100uA sink capability.
I'm trying to overdrive it via a diode and 1k resistor,
but it's not working - the RAMP pin doesn't respond well.

Before I spend a chunk of time characterizing the exotic
clocking properties of this chip, can anyone who's "been
there and done that" give me some guidance?

Thanks,
- Win

whill_at_picovolt-dot-com

 

[R.Legg]

Some years ago Unitrode, now TI, introduced the uc3875
phase-shift resonant PWM controller. Four years ago
they introduced an advanced cmos version, the ucc3895.
This IC can run up to 1MHz and is well suited to high-
power zero-voltage-transition dc-dc converters.

I'm using a '3895 with my favorite Intersil HIP4081 to
drive four MOSFETs in a 600W H-bridge at 300 and 600kHz
to energize a resonant high-voltage (10kV) transformer.
The intended frequency is crystal derived, so I'm trying
to synchronize the '3895 as described in the data sheet,
http://focus.ti.com/docs/prod/folders/print/ucc3895.html
via the SYNC pin. Although this pin is an output, it's
a "weak" one with 400uA drive and 100uA sink capability.
I'm trying to overdrive it via a diode and 1k resistor,
but it's not working - the RAMP pin doesn't respond well.

Before I spend a chunk of time characterizing the exotic
clocking properties of this chip, can anyone who's "been
there and done that" give me some guidance?

Thanks,
- Win

Synchronizing information should be a suitably narrow pulse that
doesn't result in the pin going higher than the 5V reference, or lower
than ground.

One way of ensuring this is to emitter-follow the info into the sync
pin, from an npn bipolar, with collector tied to the reference.
Inversion is possible with a pnp common source. The reference should
be locally decoupled. Because the pull-down on the sync pin is weak, a
pull-down resistor is recommended by the mfr, even under normal
conditions, to reduce dead-time.

The free-running frequency must be lower than sync frequency, ideally
by ~20%. A synchronizing range between 300 and 600 khz means reduced
noise immunity at the high frequency end, due to the reduced ramp
amplitudes when derived from Ct or mag current. If you are FMing the
chip, thats a potential reduction to 40% of pre-synced values or less
- effective gain out of the error amp triples (as well as noise
sensitivity), as a result.

Where is your ramp coming from? What is the misbehaviour noted? If Ct
is the source, is it safely isolated, in the process?

RL

 

[Winfield Hill]

R.Legg wrote...

Winfield Hill wrote ...

... I'm using [TI's ucc3895 resonant phase-shift
ZVT PWM controller] with my favorite Intersil HIP4081 to
drive four MOSFETs in a 600W H-bridge at 300 and 600kHz
to energize a resonant high-voltage (10kV) transformer.
The intended frequency is crystal derived, so I'm trying
to synchronize the '3895 as described in the data sheet,
http://focus.ti.com/docs/prod/folders/print/ucc3895.html
via the SYNC pin. Although this pin is an output, it's
a "weak" one with 400uA drive and 100uA sink capability.
I'm trying to overdrive it via a diode and 1k resistor,
but it's not working - the RAMP pin doesn't respond well.

Synchronizing information should be a suitably narrow pulse
that doesn't result in the pin going higher than the 5V
reference, or lower than ground.

One way of ensuring this is to emitter-follow ...

Thanks, RL, for your help! Glad to find someone familiar
with this IC. You inspired my to try driving SYNC directly
from my 74HC86 frequency doubler (and I'll later run the '86
from the 5V ref). That seems to be working fine now.

The free-running frequency must be lower than sync frequency,
ideally by ~20%. A synchronizing range between 300 and 600 khz
means reduced noise immunity at the high frequency end...

I should explain that I'll use my circuit either at 300kHz
or 600kHz, and can change mode settings accordingly. But
I don't understand why I should use CT and RT anyway -
just skip that unwanted ocillator! I've got CT grounded.

Where is your ramp coming from? What is the misbehaviour
noted? If Ctis the source, is it safely isolated, in the
process?

Actually, that's my problem now. The FET that's supposed
to discharge the RAMP capacitor only takes it down by 2V
during my 70ns SYNC pulse. Maybe my cap is too big (1nF),
but if so, what a wimp that FET is! Anyway, I'm going to
reduce the cap to 100pF or so... Hmm, maybe I should tie
the CT RT linear ramp to the RAMP terminal (taking care to
limit it to 2.2V, etc.), is that your suggestion?

What do you mean, safely isolated? I see the Eval circuit
shows an emitter follower, but it's not clear why...

Next (fearsome) problems after getting the RAMP working,
stabilize the loop and tune the adaptive-delay circuits.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Genome]

Some years ago Unitrode, now TI, introduced the uc3875
phase-shift resonant PWM controller. Four years ago
they introduced an advanced cmos version, the ucc3895.
This IC can run up to 1MHz and is well suited to high-
power zero-voltage-transition dc-dc converters.

I'm using a '3895 with my favorite Intersil HIP4081 to
drive four MOSFETs in a 600W H-bridge at 300 and 600kHz
to energize a resonant high-voltage (10kV) transformer.
The intended frequency is crystal derived, so I'm trying
to synchronize the '3895 as described in the data sheet,
http://focus.ti.com/docs/prod/folders/print/ucc3895.html
via the SYNC pin. Although this pin is an output, it's
a "weak" one with 400uA drive and 100uA sink capability.
I'm trying to overdrive it via a diode and 1k resistor,
but it's not working - the RAMP pin doesn't respond well.

Before I spend a chunk of time characterizing the exotic
clocking properties of this chip, can anyone who's "been
there and done that" give me some guidance?

Thanks,
- Win

whill_at_picovolt-dot-com

The basic concept of synchronisation circuits in SMPS IC's is a load of
bollicky dirt crap shite shit arse. You get to dangle some bit of......
ohhhh bloody hell, Why Bother!

It's crap....... Take the data sheet and look at the way they think the
oscillator works............?

PDF, figure 5) I'm sure you can.... I wouldn't like to suggest that your
general access point isn't worth having..... but you go **** off and scrape
your head as to how. Try and figure out that it's more than a marginally
piss poor implementation.

Then ask yourself WHY?....... they don't talk to much about it in the data
sheet.

Now, if you want to come here and ask questions.... Tell us why it's shit.



Adaptive dead time! Hah, my beery puke is worth more.



Better use a phase locked loop.


DNA

 

[Genome]

The basic concept of synchronisation circuits in SMPS IC's is a load of
bollicky dirt crap shite shit arse. You get to dangle some bit of......
ohhhh bloody hell, Why Bother!

It's crap....... Take the data sheet and look at the way they think the
oscillator works............?

PDF, figure 5) I'm sure you can.... I wouldn't like to suggest that your
general access point isn't worth having..... but you go **** off and scrape
your head as to how. Try and figure out that it's more than a marginally
piss poor implementation.

Then ask yourself WHY?....... they don't talk to much about it in the data
sheet.

Now, if you want to come here and ask questions.... Tell us why it's shit.



Adaptive dead time! Hah, my beery puke is worth more.



Better use a phase locked loop.


DNA

oo,,''


Use as required

DNA

 

[R.Legg]

Actually, that's my problem now. The FET that's supposed
to discharge the RAMP capacitor only takes it down by 2V
during my 70ns SYNC pulse. Maybe my cap is too big (1nF),
but if so, what a wimp that FET is! Anyway, I'm going to
reduce the cap to 100pF or so... Hmm, maybe I should tie
the CT RT linear ramp to the RAMP terminal (taking care to
limit it to 2.2V, etc.), is that your suggestion?

You definitely need a positive going repeatable signal on the ramp pin
for the PWM circuit to function.

The presence of Ct and Rt pins can be used to save real estate.

Rt values can be switched to modify amplitudes as sync frequencies
change. Use the app note to determine suitable cap sizes to ensure
discharge on the ct pin. Capacity (if any)at the ramp pin should be
less than 200pf if you want it to discharge quickly.

RL

 

[Winfield Hill]

R.Legg wrote...

Winfield wrote ...


You definitely need a positive going repeatable signal on the
ramp pin for the PWM circuit to function.

The presence of Ct and Rt pins can be used to save real estate.

Rt values can be switched to modify amplitudes as sync frequencies
change. Use the app note to determine suitable cap sizes to ensure
discharge on the ct pin. Capacity (if any)at the ramp pin should
be less than 200pf if you want it to discharge quickly.

Thanks, RL. I tied CT and RAMP together with a 150pF cap for use
at 300kHz and now have a nice 2V ramp. The OSC flip-flop never
comes on, and the 70ns SYNC input pulse seems to work well. Yes,
the Rt pin is a convenient place for frequency-range switching.

I have a little local loop using a stage of the 'HC86 for feedback
to the error integrator, but that's another story.

Everything is looking good, so tomorrow I'll find time to go ahead
and connect my 4081A stage and start driving the 600W H-bridge.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Winfield Hill]

Winfield Hill wrote ...

R.Legg wrote...

Thanks, RL. I tied CT and RAMP together with a 150pF cap for use
at 300kHz and now have a nice 2V ramp. The OSC flip-flop never
comes on, and the 70ns SYNC input pulse seems to work well. Yes,
the Rt pin is a convenient place for frequency-range switching.

I have a little local loop using a stage of the 'HC86 for feedback
to the error integrator, but that's another story.

Everything is looking good, so tomorrow I'll find time to go ahead
and connect my HIP4081A stage and start driving the 600W H-bridge.

Just a note to mention that the ucc3895 works beautifully, and lets
me make a nearly 0 to 100% (ignoring the programmable turn-on delay)
PWM duty cycle consisting simply of two phase-shifted square waves.
Along with Intersil's driver chip making a high-power ac converter
is greatly simplified.

The phase-shift scheme works so elegantly well that I'm surprised no
other IC manufacturers have offered parts using it. There are some
Unitrode patents, but surely basic phase-shift PWM is an old freely-
available technology? I'll check, if time permits. <snork>

 

[R.Legg]

Winfield Hill wrote ...

Just a note to mention that the ucc3895 works beautifully, and lets
me make a nearly 0 to 100% (ignoring the programmable turn-on delay)
PWM duty cycle consisting simply of two phase-shifted square waves.
Along with Intersil's driver chip making a high-power ac converter
is greatly simplified.

The phase-shift scheme works so elegantly well that I'm surprised no
other IC manufacturers have offered parts using it. There are some
Unitrode patents, but surely basic phase-shift PWM is an old freely-
available technology? I'll check, if time permits. <snork>

When you get to the power levels normally controlled by this
technique, the availability of dedicated chips isn't an issue. This
technique is probably misapplied to transformer-coupled circuits at
higher power levels, due to the lousy copper utilization. A more
usefull version is the Dual Active Bridge, where the phase shift
exists between input and output.

Though there's nothing to stop anybody from sticking a transformer in,
it makes reversible power transfer that much more complicated, and is
usually unneccesary, for larger electric machines, where the load can
be applied to the phase shifted switches directly. The freewheeling
current in this case would normally occur in the load, but a
significant ripple reduction is achieved, and LF AC or reversible DC
information is easily generated.

RL

 

[Winfield Hill]

R.Legg wrote...

When you get to the power levels normally controlled by this
technique, the availability of dedicated chips isn't an issue. This
technique is probably misapplied to transformer-coupled circuits at
higher power levels, due to the lousy copper utilization. A more
usefull version is the Dual Active Bridge, where the phase shift
exists between input and output.

I must be confused about Dual Active Bridges, don't they generally
have a power-delivery transformer?

Though there's nothing to stop anybody from sticking a transformer in,
it makes reversible power transfer that much more complicated, and is
usually unneccesary, for larger electric machines, where the load can
be applied to the phase shifted switches directly.

In this case the load is floating?

The freewheeling current in this case would normally occur in the load,
but a significant ripple reduction is achieved, and LF AC or reversible
DC information is easily generated.

In my case a transformer is mandatory, as the output is 10kV. :>)
I'm operating at 500W at 300 and 600kHz, and may find the phase-shift
scheme appealing in part for that reason, but its ability to deliver a
nearly 0 to 100% power range strikes me as very useful for working over
wide dynamic-ranges, even at low power levels. At low power levels the
availability of a dedicated phase-shift IC does simplify the circuitry.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[R.Legg]

R.Legg wrote...

I must be confused about Dual Active Bridges, don't they generally
have a power-delivery transformer?

Yes. This is a more useful version of a phase-modulated
transformer-coupled circuit.

In this case the load is floating?

Usually, the modulation is performed on three phases; the result has
an effective neutral point.

In my case a transformer is mandatory, as the output is 10kV. :>)
I'm operating at 500W at 300 and 600kHz, and may find the phase-shift
scheme appealing in part for that reason, but its ability to deliver a
nearly 0 to 100% power range strikes me as very useful for working over
wide dynamic-ranges, even at low power levels. At low power levels the
availability of a dedicated phase-shift IC does simplify the circuitry.

It is most effective close to maximum duty - and so finds a niche when
a power factor preregulator is present and only a small hold-up time
(from this particular source) is required.

RL