C
[email protected]
- Jan 1, 1970
- 0
Hi,
the other day I was looking at rail-to-rail OpAmps and was pleased to
see that an internal circuit schematic is revealed in the MC33201
datasheet <http://www.onsemi.com/pub/Collateral/MC33201-D.PDF>, a
practice that seems to have become rare nowadays.
The MC33201 is a purely bipolar device operating from 1.8 to 12V, with
an open-loop gain of 300000, a gain-bandwidth product of 2.2MHz, and a
slew rate of 1V/us - sort of a low-voltage rail-to-rail version of the
uA741.
I soon realized that I failed to comprehend how the rail-to-rail output
stage is supposed to work: while the current sink (or is it called the
source?) toward VEE poses no problem (it's just two cascaded NPN
transistors), the current source (the sink?) toward VCC consists of an
PNP current mirror driven by two cascaded NPNs (again) which are driven
by another PNP current mirror which is driven by a *constant-current*
source! (There are no current limiting resistors at all, by the way.)
The device is said to have an output current capability of 50..80 mA on
the one hand, and a quiescent supply current of only 0.9mA on the other.
Is this a case of deliberate hiding of information? Or just an honest
omission? Can somebody supply the missing piece of information?
I had hoped to learn how a smooth crossover from sinking to sourcing of
output current is managed in a rail-to-rail output stage - without a
dead zone (like the uA709 had), which would show up as steplike signal
distortions, epecially for fast transitions - and without shorting Vcc
to Vee, of course.
TIA,
Martin.
the other day I was looking at rail-to-rail OpAmps and was pleased to
see that an internal circuit schematic is revealed in the MC33201
datasheet <http://www.onsemi.com/pub/Collateral/MC33201-D.PDF>, a
practice that seems to have become rare nowadays.
The MC33201 is a purely bipolar device operating from 1.8 to 12V, with
an open-loop gain of 300000, a gain-bandwidth product of 2.2MHz, and a
slew rate of 1V/us - sort of a low-voltage rail-to-rail version of the
uA741.
I soon realized that I failed to comprehend how the rail-to-rail output
stage is supposed to work: while the current sink (or is it called the
source?) toward VEE poses no problem (it's just two cascaded NPN
transistors), the current source (the sink?) toward VCC consists of an
PNP current mirror driven by two cascaded NPNs (again) which are driven
by another PNP current mirror which is driven by a *constant-current*
source! (There are no current limiting resistors at all, by the way.)
The device is said to have an output current capability of 50..80 mA on
the one hand, and a quiescent supply current of only 0.9mA on the other.
Is this a case of deliberate hiding of information? Or just an honest
omission? Can somebody supply the missing piece of information?
I had hoped to learn how a smooth crossover from sinking to sourcing of
output current is managed in a rail-to-rail output stage - without a
dead zone (like the uA709 had), which would show up as steplike signal
distortions, epecially for fast transitions - and without shorting Vcc
to Vee, of course.
TIA,
Martin.
