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diode protection for MOSFET output?

R

Robert Morein

Jan 1, 1970
0
The device will produce a modified square wave output, using N and P channel
power MOSFETs, to drive an inductive load.

The rail voltage will be 50V, the MOSFETs are rated at 100V. However,
depending upon the speed of the switching transition, far high switching
transients can be generated by the load.

Rather than limit the switching speed, is there a diode device that could be
paralleled with the load that will effectively clip the switching transient?
 
S

Stefan Heinzmann

Jan 1, 1970
0
Robert said:
The device will produce a modified square wave output, using N and P channel
power MOSFETs, to drive an inductive load.

The rail voltage will be 50V, the MOSFETs are rated at 100V. However,
depending upon the speed of the switching transition, far high switching
transients can be generated by the load.

Rather than limit the switching speed, is there a diode device that could be
paralleled with the load that will effectively clip the switching transient?

Paralleled with the load? Well, there are Varistors, Zener diodes,
Transil or Tranzorb or whatever they're called, gas-filled surge
arrestors, or even a plain diode if the load is driven with one polarity
only.

If you don't insist in connecting the device across the load you might
want to connect the diodes between the load and the supply rails.

Hint: Use diodes that are fast enough, for example Schottky diodes.
 
P

Paul Burridge

Jan 1, 1970
0
The device will produce a modified square wave output, using N and P channel
power MOSFETs, to drive an inductive load.

The rail voltage will be 50V, the MOSFETs are rated at 100V. However,
depending upon the speed of the switching transition, far high switching
transients can be generated by the load.

Rather than limit the switching speed, is there a diode device that could be
paralleled with the load that will effectively clip the switching transient?

Yes, they're called diodes. Get the right type and you're sorted.
 
W

Winfield Hill

Jan 1, 1970
0
Paul Burridge wrote...
Yes, they're called diodes. Get the right type and you're sorted.

Nope. If Robert is driving his square-wave output to either the
high or low supply rail with his P- and N-channel FETs, there will
be nowhere else for the output to go. Therefore using a diode in
parallel with the load make no sense at all.

Perhaps a bit of FET PWM power-switching tutorial is in order.

A common problem with complementary-FET outputs is the high shoot-
through current that flows when one FET is turned on and the other
FET hasn't yet turned off. Although this current spike is short,
it can be rather high, and results in dangerous gate-source voltage
spikes developed across the FET's source inductance. So, although
lasting only tens of ns, these spikes can destroy one of the FETs.
The FET generally fails with a gate-drain short, creating an always
turned-on condition, causing failure of the other FET and a supply
short, which can often be dramatic to see.

The shoot-through spike problem can be solved by using a bit more
complex switching waveform to provide a dead time, during which
neither FET is turned on. But this means there's a possibility for
an inductive load current to swing the voltage to the other supply
rail during the dead time (we'll assuming missing or insufficient
snubber capacitance), at which point the opposite FET's intrinsic
body diode will conduct, clamping the load voltage (again showing
the non-functional nature of parallel load diodes).

But often one wants to avoid FET-diode conduction, because of poor
reverse-recovery time, which can lead to a nasty sharp spike when
it finally switches off. This problem can be easily solved by
paralleling each FET with an appropriate type of Schottky diode.

Returning to the more complicated timing associated with avoiding
rail-rail shoot-through currents, such timing is contained within
most half-bridge and H-bridge driver FET ICs. However, these ICs
are meant to use all N-channel FETs, and they provide the swinging
gate drive supply needed for the high-side switching FET. As many
here know, I prefer the Intersil HIP4080 series of driver ICs for
this task. I have had excellent experiences with these chips in a
number of different push-the-envelope high-frequency-power designs.

Thanks,
- Win

whill_at_picovolt-dot-com
 
G

Genome

Jan 1, 1970
0
Winfield Hill said:
Paul Burridge wrote...

Nope. If Robert is driving his square-wave output to either the
high or low supply rail with his P- and N-channel FETs, there will
be nowhere else for the output to go. Therefore using a diode in
parallel with the load make no sense at all.

Perhaps a bit of FET PWM power-switching tutorial is in order.

A common problem with complementary-FET outputs is the high shoot-
through current that flows when one FET is turned on and the other
FET hasn't yet turned off. Although this current spike is short,
it can be rather high, and results in dangerous gate-source voltage
spikes developed across the FET's source inductance. So, although
lasting only tens of ns, these spikes can destroy one of the FETs.
The FET generally fails with a gate-drain short, creating an always
turned-on condition, causing failure of the other FET and a supply
short, which can often be dramatic to see.

The shoot-through spike problem can be solved by using a bit more
complex switching waveform to provide a dead time, during which
neither FET is turned on. But this means there's a possibility for
an inductive load current to swing the voltage to the other supply
rail during the dead time (we'll assuming missing or insufficient
snubber capacitance), at which point the opposite FET's intrinsic
body diode will conduct, clamping the load voltage (again showing
the non-functional nature of parallel load diodes).

But often one wants to avoid FET-diode conduction, because of poor
reverse-recovery time, which can lead to a nasty sharp spike when
it finally switches off. This problem can be easily solved by
paralleling each FET with an appropriate type of Schottky diode.

Just to butt in.... and clarify a little, maybe.....

If the mosfet(L) is turned off whilst carrying forward current from an
inductive load the load will swing the output to the opposite rail and the
opposite mosfet body source diode will turn on. The opposite mosefet(U)
associated with this diode is then turned on shunting some, but not all of
this current. During this period the mosfet(U) and its diode is carrying
reverse current.

Current in the load begins to fall. Two things can happen.

1)

The current in the load can reverse direction so that the mosfet(U) and its
diode are now carrying forward current. The diode naturally undergoes
recovery, see later though. The mosfet(U) is turned off and the load drives
the output back to the mosfet(L)

2)

The current in the load does not reverse direction and the mosfet(U) and its
diode continue to carry forward current. The mosfet(U) is turned off and the
diode continues to carry the reverse current. The other mosfet(L) is now
turned on and begins to conducts load current. The output is still stuck at
the opposite rail.

Once the mosfet(L) is carrying full load current it has to turn off the
diode of mosfet(U) which undergoes reverse recovery. There is nothing to
limit the dI/dt associated with this and at that point you get the huge
current spike.

(possible bullshit alert)

The problem is exacerbated by the fact that reverse recovery is due to
stored charge in the diode which has to be removed before it finally turns o
ff. That stored charge depends on what has happened before. The combined
mosfet(U) and its diode may be carrying a smaller current at switch off
but......

When the load initially forward biased that diode charge equivalent to the
peak load current was injected into the diode. It is that charge which needs
to be recovered so the current spike may well be larger than expected.

In fact scenario 1) may be incorrect in that there is no voltage available
in the circuit to recover the original charge and the same spike will occur.

As you say, one solution is to add Schottky diodes across the mosfets. For
higher voltage applications, if you can suffer the losses then series
blocking diodes with parallel (fast recovery) diodes are used. Finally
series inductance, with appropriate snubbing, is an option.
 
H

Harry Dellamano

Jan 1, 1970
0
.........-----------Cut lots of good stuff by Win and
Genome______..........................
The problem is exacerbated by the fact that reverse recovery is due to
stored charge in the diode which has to be removed before it finally turns o
ff. That stored charge depends on what has happened before. The combined
mosfet(U) and its diode may be carrying a smaller current at switch off
but......

When the load initially forward biased that diode charge equivalent to the
peak load current was injected into the diode. It is that charge which needs
to be recovered so the current spike may well be larger than expected.

Are you saying a diode (any diode) will store charge based on the peak
forward current and not the instantaneous current just prior to turnoff?
Let's say we have a diode with 10A forward current that is ramped down to
1.0A in 10uS. We then reverse bias it in 50nS, the charge is proportional to
10A and not 1.0A??

Regards
Harry
 
R

Robert Morein

Jan 1, 1970
0
Winfield Hill said:
Paul Burridge wrote...

Nope. If Robert is driving his square-wave output to either the
high or low supply rail with his P- and N-channel FETs, there will
be nowhere else for the output to go. Therefore using a diode in
parallel with the load make no sense at all.

Perhaps a bit of FET PWM power-switching tutorial is in order.

A common problem with complementary-FET outputs is the high shoot-
through current that flows when one FET is turned on and the other
FET hasn't yet turned off. Although this current spike is short,
it can be rather high, and results in dangerous gate-source voltage
spikes developed across the FET's source inductance. So, although
lasting only tens of ns, these spikes can destroy one of the FETs.
The FET generally fails with a gate-drain short, creating an always
turned-on condition, causing failure of the other FET and a supply
short, which can often be dramatic to see.

The shoot-through spike problem can be solved by using a bit more
complex switching waveform to provide a dead time, during which
neither FET is turned on. But this means there's a possibility for
an inductive load current to swing the voltage to the other supply
rail during the dead time (we'll assuming missing or insufficient
snubber capacitance), at which point the opposite FET's intrinsic
body diode will conduct, clamping the load voltage (again showing
the non-functional nature of parallel load diodes).
I am allowing dead time.
Does this mean that the opposite FET's body diode will harmlessly shunt the
spike?
 
W

Winfield Hill

Jan 1, 1970
0
Robert Morein wrote...
I am allowing dead time. Does this mean that the opposite
FET's body diode will harmlessly shunt the spike?

First the FET gate voltage must drop sufficiently to turn off
the FET. Generally a considerable gate current is required to
make this happen quickly. Then, if you have an inductive load,
it'll try to keep the current flowing after the FET turns off.
The drain voltage will respond by changing at a rate given by
dV/dt = I/C, where C is the total node capacitance: the sum of
the two FETs, the wiring and load self capacitance, and snubber
capacitance if you have any. After traversing an amount equal
to the supply voltage, the opposite FET's body diode will start
conducting. Hopefully by that time the other FET will come on.
But note, dV/dt is highest at maximum load current, so the full
supply voltage range will be traversed faster, perhaps within
less than 50 to 100ns. If the FET doesn't come on till later,
the body diode can develop a full head of charge, which the FET
can try to remove after it comes on. But it'll be trying to do
so with nearly zero volts across the diode, which won't be very
effective, and which means you can get into trouble with high-
speed PWM systems. Perhaps with a slow 30kHz PWM this would be
harmless. Otherwise you may need to add Schottky diodes across
the FETs. Tell us what FETs you've selected, how much current
you'll be controlling and what PWM freqency you're considering.

Thanks,
- Win

whill_at_picovolt-dot-com
 
G

Genome

Jan 1, 1970
0
Harry Dellamano said:
.........-----------Cut lots of good stuff by Win and
Genome (Ah Shucks)
turns

Are you saying a diode (any diode) will store charge based on the peak
forward current and not the instantaneous current just prior to turnoff?
Let's say we have a diode with 10A forward current that is ramped down to
1.0A in 10uS. We then reverse bias it in 50nS, the charge is proportional to
10A and not 1.0A??

Regards
Harry

Do you want to ask that one again without the caveatS?

I did give a bullshit alert.

Otherwise.... that's the way I feel about things.

DNA
 
F

Fritz Schlunder

Jan 1, 1970
0
Harry Dellamano said:
.........-----------Cut lots of good stuff by Win and
Genome______..........................
turns

Are you saying a diode (any diode) will store charge based on the peak
forward current and not the instantaneous current just prior to turnoff?
Let's say we have a diode with 10A forward current that is ramped down to
1.0A in 10uS. We then reverse bias it in 50nS, the charge is proportional to
10A and not 1.0A??

Regards
Harry


Greetings Mr. Dellamano. My name is not Genome but I thought I might try to
answer your very good questions anyway.

From my understanging of diodes there are two competing processes that
ultimately achieve the same end result (removal of stored charge so the
diode can become fully blocking) that need to be considered separately. In
order to remove the excess diode minority carriers you can either:

1. Apply an external electric field (forcefully reverse bias the diode) to
force the excess carriers out.

or

2. Let recombination naturally remove them from the diode.

Item number 2 is always occurring within the diode to remove excess minority
carriers, and once the diode is manufactured you no longer have the ability
to change how fast this will occur. At the circuit level you typically do
have some control over how fast and when you apply external electric fields.

In your example the current very slowly ramps down from 10A forward to 1A
forward in 10us. This is a rather slow dI/dt of 0.9A/us. If the diode is a
fast recovery diode (say with datasheet published trr in the range of ~50ns)
the minority carrier lifetime will be much smaller than 10us (in the range
of the trr value). As a result by the time the current reaches 1A there
will be very few excess minority carriers (above and beyond the amount
needed to conduct a forward current of 1A) in the diode. So in this case
when you rapidly reverse bias the diode in 50ns the total excess charge
carriers that need to be removed will be from the 1A forward conduction
rather than the 10A.

That is to say, the reverse recovery stress/heating of the diode will be the
same as if the diode had simply always had a forward current of 1A and then
a reverse bias was quickly applied in 50ns.


Suppose now instead of a fast recovery diode we had a very slow diode. A
normal very slow "standard recovery" rectifier (such as the 1N400X for
instance) will probably have a minority carrier lifetime of something in the
low microseconds range (maybe around 3us IIRC). The diode reverse recovery
time specified in the datasheet (under their very specific given test
conditions) isn't quite the same number as the minority carrier lifetime,
but they are approximately the same and certainly very much related. Okay,
so lets suppose in this scenario the minority carrier lifetime is in the
vicinity of 3us.

Now as the 10A ramps down to 1A in 10us and then the diode becomes reverse
biased in 50ns the power loss will be higher than if the same diode had
instead been conducting 1A all along and then a reverse bias was applied in
the same 50ns. The total loss was however less than if the diode had been
conducting 10A all along and then a reverse bias was applied in 50ns. As
the current ramped down from 10A to 1A the minority carriers present by the
time the current reached 1A was more than the minimum normally required to
conduct a forward current of 1A.


Okay now suppose another scenario. Suppose we have a diode with extremely
slow reverse recovery characteristics and correspondingly very long minority
carrier lifetime. Suppose the minority carrier lifetime is in the vicinity
of say 200us.

Now as the forward current ramps down from 10A to 1A in 10us the number of
minority carriers present does not decrease correspondingly at all. After
the 10us are up almost all of the minority carriers needed to conduct a
forward current of 10A will still be present. Now when the diode becomes
reverse biased in 50ns the losses caused by the diode will be about the same
as if the diode had always been conducting the full 10A just prior to
becoming reverse biased.


So as you can see the minority carrier lifetime is a very important figure.
The situation is rather complicated and it [the amount of charge stored that
must be forcefully removed by external electric fields at the time of when
the diode becomes reverse biased] depends on relative time frames being
considered. Further complicating the matter is also how fast the reverse
bias gets applied.
 
F

Fritz Schlunder

Jan 1, 1970
0
Winfield Hill said:
Robert Morein wrote...

First the FET gate voltage must drop sufficiently to turn off
the FET. Generally a considerable gate current is required to
make this happen quickly. Then, if you have an inductive load,
it'll try to keep the current flowing after the FET turns off.
The drain voltage will respond by changing at a rate given by
dV/dt = I/C, where C is the total node capacitance: the sum of
the two FETs, the wiring and load self capacitance, and snubber
capacitance if you have any. After traversing an amount equal
to the supply voltage, the opposite FET's body diode will start
conducting. Hopefully by that time the other FET will come on.
But note, dV/dt is highest at maximum load current, so the full
supply voltage range will be traversed faster, perhaps within
less than 50 to 100ns. If the FET doesn't come on till later,
the body diode can develop a full head of charge, which the FET
can try to remove after it comes on. But it'll be trying to do
so with nearly zero volts across the diode, which won't be very
effective, and which means you can get into trouble with high-
speed PWM systems. Perhaps with a slow 30kHz PWM this would be
harmless. Otherwise you may need to add Schottky diodes across
the FETs. Tell us what FETs you've selected, how much current
you'll be controlling and what PWM freqency you're considering.

Thanks,
- Win

whill_at_picovolt-dot-com


Greetings Mr. Hill.

I agree with your basic analysis but I think you may be (significantly?)
overestimating the badness of the situation. Even a diode that is left to
sit by itself with no externally applied electric field will undergo
"reverse recovery" (Although I don't think that is quite the right term to
use... I consider a "reverse recovery" event being one where a previously
forward conducting diode becomes forcefully reverse biased by external
circuitry. In this case no external electric fields are applied but the
excess minority carriers get removed anyway by recombination.) if it is
allow to sit long enough. The amount of time needed to remove the excess
charge carriers depends upon the minority carrier lifetime, however I
believe the minority carrier lifetime is somewhat in the vicinity of the
datasheet published reverse recovery time figure for the MOSFET/diode. My
impression is the minority carrier lifetime is going to be somewhat longer
than the datasheet specified trr value, but still within the same basic
vicinity.

So, assuming that is true then the minority carrier lifetime of even the
slowest trr time MOSFETs would be say something in the range of less than
1us. So even with no external reverse bias applied at all a MOSFET body
diode should probably become pretty good at blocking if it is allowed to sit
for around 1us. This is a relatively short period of time for many half
bridge and full bridge topologies/applications. In your typical application
where an inductive load turns on the MOSFET body diode you have both the
remaining dead time plus the conduction time of the MOSFET (with the
activated body diode) for the diode to recover all by itself by
recombination. This would typically amount to nearly 1/2 the total cycle
time, so you would have to run your half/full bridge at over say 500kHz
before MOSFET body diode reverse recovery losses would likely become a real
issue for even the slowest MOSFET body diodes.

Of course this is a massive oversimplification of a complicated subject. In
the above paragraph I assumed a typical half/full bridge topology where the
MOSFETs alternatively turn on in diagonal pairs back and forth (IE: like
your basic hard switched full/half bridge switch mode powersupply). In a
half/full bridge topology where the MOSFETs don't always alternatively turn
on in diagonal pairs things are a bit different. An example of this might
be an AC motor control full bridge that runs the top MOSFETs in the bridge
at substantially higher frequency than the lower MOSFETs to emulate
sinusoidal drive.

If the inductive load does not store enough energy to keep the MOSFET body
diode(s) active during the entire dead time, then the diode(s) should
theoretically undergo a reverse recovery event. In this case however the
inductive device is directly "in series" with the diode(s). In this case
the inductor performs a rather novel effect of limiting the dI/dt. That is,
the inductive current (which is also the forward diode current) ramps
smoothly down to zero and then if the diodes allow it would ramp slightly
back up from zero in the reverse direction. Of course, small dI/dt values
will result in small reverse recovery currents assuming the diode(s) isn't
excruciatingly slow.

So the situation is very complicated, but I don't think in most half/full
bridge topologies the MOSFET body diode reverse recovery is much of a
problem.
 
R

Robert Morein

Jan 1, 1970
0
Winfield Hill said:
Robert Morein wrote...

First the FET gate voltage must drop sufficiently to turn off
the FET. Generally a considerable gate current is required to
make this happen quickly. Then, if you have an inductive load,
it'll try to keep the current flowing after the FET turns off.
The drain voltage will respond by changing at a rate given by
dV/dt = I/C, where C is the total node capacitance: the sum of
the two FETs, the wiring and load self capacitance, and snubber
capacitance if you have any. After traversing an amount equal
to the supply voltage, the opposite FET's body diode will start
conducting. Hopefully by that time the other FET will come on.
But note, dV/dt is highest at maximum load current, so the full
supply voltage range will be traversed faster, perhaps within
less than 50 to 100ns. If the FET doesn't come on till later,
the body diode can develop a full head of charge, which the FET
can try to remove after it comes on. But it'll be trying to do
so with nearly zero volts across the diode, which won't be very
effective, and which means you can get into trouble with high-
speed PWM systems. Perhaps with a slow 30kHz PWM this would be
harmless. Otherwise you may need to add Schottky diodes across
the FETs. Tell us what FETs you've selected, how much current
you'll be controlling and what PWM freqency you're considering.

Thanks,
- Win
This is a very slow system, running at under 1 kHz.
There is ample dead time. I'm not using driver IC's, because this is a
custom app.
There are two symmetrical supply rails, +/- 100V.

The MOSFETs are standard IRF 100V parts, NMOS & PMOS, rated at 40 amps.
The MOSFETs are driven through small telephone isolation transformers
connected between the gate and the supply rail. This makes it possible to
raise the gate above the supply rail to achieve full conduction.

The driver logic consists of two comparators, one for each side of the
waveform. The comparators are driven by a sinewave signal generator to
provide symmetrical drive. The higher the input amplitude from the signal
generator, the less deadtime. However, there is always a substantial
deadtime.

The load has very high inductance. The sole limitation in switching speed is
the induced transient. Hence my interest in a snubbing device, if necessary.
There seems to be some suggestion that the body diode will function in this
way -- I would appreciate a clarification.
 
H

Harry Dellamano

Jan 1, 1970
0
Fritz Schlunder said:
Harry Dellamano said:
.........-----------Cut lots of good stuff by Win and
Genome______..........................
turns

Are you saying a diode (any diode) will store charge based on the peak
forward current and not the instantaneous current just prior to turnoff?
Let's say we have a diode with 10A forward current that is ramped down to
1.0A in 10uS. We then reverse bias it in 50nS, the charge is
proportional
to
10A and not 1.0A??

Regards
Harry


Greetings Mr. Dellamano. My name is not Genome but I thought I might try to
answer your very good questions anyway.

From my understanging of diodes there are two competing processes that
ultimately achieve the same end result (removal of stored charge so the
diode can become fully blocking) that need to be considered separately. In
order to remove the excess diode minority carriers you can either:

1. Apply an external electric field (forcefully reverse bias the diode) to
force the excess carriers out.

or

2. Let recombination naturally remove them from the diode.

Item number 2 is always occurring within the diode to remove excess minority
carriers, and once the diode is manufactured you no longer have the ability
to change how fast this will occur. At the circuit level you typically do
have some control over how fast and when you apply external electric fields.

In your example the current very slowly ramps down from 10A forward to 1A
forward in 10us. This is a rather slow dI/dt of 0.9A/us. If the diode is a
fast recovery diode (say with datasheet published trr in the range of ~50ns)
the minority carrier lifetime will be much smaller than 10us (in the range
of the trr value). As a result by the time the current reaches 1A there
will be very few excess minority carriers (above and beyond the amount
needed to conduct a forward current of 1A) in the diode. So in this case
when you rapidly reverse bias the diode in 50ns the total excess charge
carriers that need to be removed will be from the 1A forward conduction
rather than the 10A.

That is to say, the reverse recovery stress/heating of the diode will be the
same as if the diode had simply always had a forward current of 1A and then
a reverse bias was quickly applied in 50ns.


Suppose now instead of a fast recovery diode we had a very slow diode. A
normal very slow "standard recovery" rectifier (such as the 1N400X for
instance) will probably have a minority carrier lifetime of something in the
low microseconds range (maybe around 3us IIRC). The diode reverse recovery
time specified in the datasheet (under their very specific given test
conditions) isn't quite the same number as the minority carrier lifetime,
but they are approximately the same and certainly very much related. Okay,
so lets suppose in this scenario the minority carrier lifetime is in the
vicinity of 3us.

Now as the 10A ramps down to 1A in 10us and then the diode becomes reverse
biased in 50ns the power loss will be higher than if the same diode had
instead been conducting 1A all along and then a reverse bias was applied in
the same 50ns. The total loss was however less than if the diode had been
conducting 10A all along and then a reverse bias was applied in 50ns. As
the current ramped down from 10A to 1A the minority carriers present by the
time the current reached 1A was more than the minimum normally required to
conduct a forward current of 1A.


Okay now suppose another scenario. Suppose we have a diode with extremely
slow reverse recovery characteristics and correspondingly very long minority
carrier lifetime. Suppose the minority carrier lifetime is in the vicinity
of say 200us.

Now as the forward current ramps down from 10A to 1A in 10us the number of
minority carriers present does not decrease correspondingly at all. After
the 10us are up almost all of the minority carriers needed to conduct a
forward current of 10A will still be present. Now when the diode becomes
reverse biased in 50ns the losses caused by the diode will be about the same
as if the diode had always been conducting the full 10A just prior to
becoming reverse biased.


So as you can see the minority carrier lifetime is a very important figure.
The situation is rather complicated and it [the amount of charge stored that
must be forcefully removed by external electric fields at the time of when
the diode becomes reverse biased] depends on relative time frames being
considered. Further complicating the matter is also how fast the reverse
bias gets applied.

Greetings Mr. Schlunder,
Thank you for explaining the workings of trr and how minority carrier
lifetime is a player in this game of charge control. Intuitively I thought
this was the case but you glued it all together in a nice package.
As you mentioned in another thread with W.H.; body diode trr is not a
factor in <250kHz ,ZVS, F/H bridges. I also believe this to be true but
often see schematics with added series or parallel diodes to improve this
defect. The semi companies sometimes package fast diodes with their FETs to
be used in this way. Do you really think this is necessary?

Regards
Harry
 
F

Fred Bloggs

Jan 1, 1970
0
Fritz said:
.........-----------Cut lots of good stuff by Win and
Genome______..........................


turns

the


Are you saying a diode (any diode) will store charge based on the peak
forward current and not the instantaneous current just prior to turnoff?
Let's say we have a diode with 10A forward current that is ramped down to
1.0A in 10uS. We then reverse bias it in 50nS, the charge is proportional
to

10A and not 1.0A??

Regards
Harry



Greetings Mr. Dellamano. My name is not Genome but I thought I might try to
answer your very good questions anyway.

From my understanging of diodes there are two competing processes that
ultimately achieve the same end result (removal of stored charge so the
diode can become fully blocking) that need to be considered separately. In
order to remove the excess diode minority carriers you can either:

1. Apply an external electric field (forcefully reverse bias the diode) to
force the excess carriers out.

or

2. Let recombination naturally remove them from the diode.

Item number 2 is always occurring within the diode to remove excess minority
carriers, and once the diode is manufactured you no longer have the ability
to change how fast this will occur. At the circuit level you typically do
have some control over how fast and when you apply external electric fields.

In your example the current very slowly ramps down from 10A forward to 1A
forward in 10us. This is a rather slow dI/dt of 0.9A/us. If the diode is a
fast recovery diode (say with datasheet published trr in the range of ~50ns)
the minority carrier lifetime will be much smaller than 10us (in the range
of the trr value). As a result by the time the current reaches 1A there
will be very few excess minority carriers (above and beyond the amount
needed to conduct a forward current of 1A) in the diode. So in this case
when you rapidly reverse bias the diode in 50ns the total excess charge
carriers that need to be removed will be from the 1A forward conduction
rather than the 10A.

That is to say, the reverse recovery stress/heating of the diode will be the
same as if the diode had simply always had a forward current of 1A and then
a reverse bias was quickly applied in 50ns.


Suppose now instead of a fast recovery diode we had a very slow diode. A
normal very slow "standard recovery" rectifier (such as the 1N400X for
instance) will probably have a minority carrier lifetime of something in the
low microseconds range (maybe around 3us IIRC). The diode reverse recovery
time specified in the datasheet (under their very specific given test
conditions) isn't quite the same number as the minority carrier lifetime,
but they are approximately the same and certainly very much related. Okay,
so lets suppose in this scenario the minority carrier lifetime is in the
vicinity of 3us.

Now as the 10A ramps down to 1A in 10us and then the diode becomes reverse
biased in 50ns the power loss will be higher than if the same diode had
instead been conducting 1A all along and then a reverse bias was applied in
the same 50ns. The total loss was however less than if the diode had been
conducting 10A all along and then a reverse bias was applied in 50ns. As
the current ramped down from 10A to 1A the minority carriers present by the
time the current reached 1A was more than the minimum normally required to
conduct a forward current of 1A.


Okay now suppose another scenario. Suppose we have a diode with extremely
slow reverse recovery characteristics and correspondingly very long minority
carrier lifetime. Suppose the minority carrier lifetime is in the vicinity
of say 200us.

Now as the forward current ramps down from 10A to 1A in 10us the number of
minority carriers present does not decrease correspondingly at all. After
the 10us are up almost all of the minority carriers needed to conduct a
forward current of 10A will still be present. Now when the diode becomes
reverse biased in 50ns the losses caused by the diode will be about the same
as if the diode had always been conducting the full 10A just prior to
becoming reverse biased.


So as you can see the minority carrier lifetime is a very important figure.
The situation is rather complicated and it [the amount of charge stored that
must be forcefully removed by external electric fields at the time of when
the diode becomes reverse biased] depends on relative time frames being
considered. Further complicating the matter is also how fast the reverse
bias gets applied.

That explanation is all well and good but it does not account for the
main damaging effect of the reverse recovery when driven through an
inductance and that is the rapid production of a fairly huge reverse
voltage transient when the diode does recover. The inductance is driving
a constant reverse current through the diode while the diode voltage
drop remains at +Vd its forward bias voltage, so the external circuit
actually then forces a /buildup/ of reverse diode current even though
the reverse current is removing excess charge density from the PN
junction. So you have this really bad situation where diode reverse
current is increasing and diode excess charge density is decreasing. At
the intersection in time of sufficient diode recovery to no longer
support the instant reverse current, the diode rapidly begins to
stand-off the external circuit current which coming from an inductance
is a bad mix resulting in a reverse voltage peak limited only by the
inductance stored energy and the circuit stray capacitance- or the diode
reverse avalanches at a high enough voltage to cause rapid discharge of
the inductors energy.
 
H

Harry Dellamano

Jan 1, 1970
0
Fred Bloggs said:
Fritz said:
.........-----------Cut lots of good stuff by Win and
Genome______..........................


The problem is exacerbated by the fact that reverse recovery is due to
stored charge in the diode which has to be removed before it finally
turns

o

ff. That stored charge depends on what has happened before. The combined
mosfet(U) and its diode may be carrying a smaller current at switch off
but......

When the load initially forward biased that diode charge equivalent to
the

peak load current was injected into the diode. It is that charge which

needs

to be recovered so the current spike may well be larger than expected.

Are you saying a diode (any diode) will store charge based on the peak
forward current and not the instantaneous current just prior to turnoff?
Let's say we have a diode with 10A forward current that is ramped down to
1.0A in 10uS. We then reverse bias it in 50nS, the charge is
proportional

to
10A and not 1.0A??

Regards
Harry



Greetings Mr. Dellamano. My name is not Genome but I thought I might try to
answer your very good questions anyway.

From my understanging of diodes there are two competing processes that
ultimately achieve the same end result (removal of stored charge so the
diode can become fully blocking) that need to be considered separately. In
order to remove the excess diode minority carriers you can either:

1. Apply an external electric field (forcefully reverse bias the diode) to
force the excess carriers out.

or

2. Let recombination naturally remove them from the diode.

Item number 2 is always occurring within the diode to remove excess minority
carriers, and once the diode is manufactured you no longer have the ability
to change how fast this will occur. At the circuit level you typically do
have some control over how fast and when you apply external electric fields.

In your example the current very slowly ramps down from 10A forward to 1A
forward in 10us. This is a rather slow dI/dt of 0.9A/us. If the diode is a
fast recovery diode (say with datasheet published trr in the range of ~50ns)
the minority carrier lifetime will be much smaller than 10us (in the range
of the trr value). As a result by the time the current reaches 1A there
will be very few excess minority carriers (above and beyond the amount
needed to conduct a forward current of 1A) in the diode. So in this case
when you rapidly reverse bias the diode in 50ns the total excess charge
carriers that need to be removed will be from the 1A forward conduction
rather than the 10A.

That is to say, the reverse recovery stress/heating of the diode will be the
same as if the diode had simply always had a forward current of 1A and then
a reverse bias was quickly applied in 50ns.


Suppose now instead of a fast recovery diode we had a very slow diode. A
normal very slow "standard recovery" rectifier (such as the 1N400X for
instance) will probably have a minority carrier lifetime of something in the
low microseconds range (maybe around 3us IIRC). The diode reverse recovery
time specified in the datasheet (under their very specific given test
conditions) isn't quite the same number as the minority carrier lifetime,
but they are approximately the same and certainly very much related. Okay,
so lets suppose in this scenario the minority carrier lifetime is in the
vicinity of 3us.

Now as the 10A ramps down to 1A in 10us and then the diode becomes reverse
biased in 50ns the power loss will be higher than if the same diode had
instead been conducting 1A all along and then a reverse bias was applied in
the same 50ns. The total loss was however less than if the diode had been
conducting 10A all along and then a reverse bias was applied in 50ns. As
the current ramped down from 10A to 1A the minority carriers present by the
time the current reached 1A was more than the minimum normally required to
conduct a forward current of 1A.


Okay now suppose another scenario. Suppose we have a diode with extremely
slow reverse recovery characteristics and correspondingly very long minority
carrier lifetime. Suppose the minority carrier lifetime is in the vicinity
of say 200us.

Now as the forward current ramps down from 10A to 1A in 10us the number of
minority carriers present does not decrease correspondingly at all. After
the 10us are up almost all of the minority carriers needed to conduct a
forward current of 10A will still be present. Now when the diode becomes
reverse biased in 50ns the losses caused by the diode will be about the same
as if the diode had always been conducting the full 10A just prior to
becoming reverse biased.


So as you can see the minority carrier lifetime is a very important figure.
The situation is rather complicated and it [the amount of charge stored that
must be forcefully removed by external electric fields at the time of when
the diode becomes reverse biased] depends on relative time frames being
considered. Further complicating the matter is also how fast the reverse
bias gets applied.

That explanation is all well and good but it does not account for the
main damaging effect of the reverse recovery when driven through an
inductance and that is the rapid production of a fairly huge reverse
voltage transient when the diode does recover. The inductance is driving
a constant reverse current through the diode while the diode voltage
drop remains at +Vd its forward bias voltage, so the external circuit
actually then forces a /buildup/ of reverse diode current even though
the reverse current is removing excess charge density from the PN
junction. So you have this really bad situation where diode reverse
current is increasing and diode excess charge density is decreasing. At
the intersection in time of sufficient diode recovery to no longer
support the instant reverse current, the diode rapidly begins to
stand-off the external circuit current which coming from an inductance
is a bad mix resulting in a reverse voltage peak limited only by the
inductance stored energy and the circuit stray capacitance- or the diode
reverse avalanches at a high enough voltage to cause rapid discharge of
the inductors energy.
Hey Fred,
But the actions you describe are exactly why we insert enough node capacity
to conduct all current from the "flying" inductance and allow the FET and
it's parasitic diode to shut off gracefully and enable ZVS with dv/dt
controlled by L+C resonate networks. This capacity must be large enough to
allow the gate drive to turn the FET completely "off" before Miller capacity
comes into play and destroys ZVS.
Regards
Harry
 
R

R.Legg

Jan 1, 1970
0
The driver logic consists of two comparators, one for each side of the
waveform. The comparators are driven by a sinewave signal generator to
provide symmetrical drive. The higher the input amplitude from the signal
generator, the less deadtime. However, there is always a substantial
deadtime.

The load has very high inductance. The sole limitation in switching speed is
the induced transient. Hence my interest in a snubbing device, if necessary.
There seems to be some suggestion that the body diode will function in this
way -- I would appreciate a clarification.

If the load current is freewheeling in an unenhanced mosfet's body
diode (enen during a 'dead-time' interval) and the opposing fet in the
half-bridge arm is then turned on, the dV/dT of the node must be
limited to below a level that will turn on a parasitic internal BJT.
This would induce currents greatly in excess off those accounted for
by the parasitic diode's reverse recovery charge.

Although switching frequency is low, at higher load currents the
actual current in the on-coming switch can be more than double the
load current when the freewheeling diode snaps off, producing
un-anticipated dV/dT rates on the switched node.

This is one reason why schottkys have been suggested, in an attempt to
keep the parasitic diodes out of action. This may not allways be
entirely effective, on it's own.

Trying to recover freewheeling load current to the supply will only be
effective if the supply can absorb the energy, without producing
unanticipated voltage levels. Perhaps this is the problem that you
were refering to in your original post.

RL
 
L

legg

Jan 1, 1970
0
There are two symmetrical supply rails, +/- 100V.

The MOSFETs are standard IRF 100V parts, NMOS & PMOS, rated at 40 amps.
The MOSFETs are driven through small telephone isolation transformers
connected between the gate and the supply rail. This makes it possible to
raise the gate above the supply rail to achieve full conduction.

I missed this part before.

You mention two supply rails. What do you mean by symmetrical?

How are you connecting your 100V-rated parts into the circuit if the
supply rails can be identified by a +/-100V polarity?

RL
 
F

Fritz Schlunder

Jan 1, 1970
0
So as you can see the minority carrier lifetime is a very important figure.
The situation is rather complicated and it [the amount of charge stored that
must be forcefully removed by external electric fields at the time of when
the diode becomes reverse biased] depends on relative time frames being
considered. Further complicating the matter is also how fast the reverse
bias gets applied.

Greetings Mr. Schlunder,
Thank you for explaining the workings of trr and how minority carrier
lifetime is a player in this game of charge control. Intuitively I thought
this was the case but you glued it all together in a nice package.
As you mentioned in another thread with W.H.; body diode trr is not a
factor in <250kHz ,ZVS, F/H bridges. I also believe this to be true but
often see schematics with added series or parallel diodes to improve this
defect.


Indeed, I too have often found shematics that do this. Typically however
these schematics are found while browsing around on the internet. Typically
these schematics are generated by some relative amateur who is constructing
a rather ambitious hobby project involving power electronics. Naturally
these people are proud of their creation and want to share their results
with the world. Unfortunately this sometimes results in the blind leading
the blind, since sometimes other people will see the project, duplicate it,
and then post their own version on the internet as well.

They probably aren't always wrong however. In some rather extreme cases
sometimes the extra diodes may indeed be useful. Solid state tesla coils
may be one such example. Quite often the solid state tesla coil designs out
there run at really high frequencies (relative to your typical power
electronic circuit) sometimes approaching or even exceeding 1 MHz. In these
cases the primary of the tesla coil often is of very low inductance but
stores a very large amount of energy due to the large currents involved.
Since the voltages are usually fairly high the MOSFET body diodes typically
have rather bad reverse recovery times. In some of these cases it does
indeed seem to me that the extra diodes may have some useful impact. I
haven't built a solid state tesla coil to verify this however.


The semi companies sometimes package fast diodes with their FETs to
be used in this way. Do you really think this is necessary?


Yes, I think these MOSFET offerings do sometimes have some real appeal.
They aren't for everything however. Of the devices with integrated fast
diodes I have seen, they have been relatively low voltage MOSFETs paralleled
with a schottky diode. This is an ideal combination for use as a syncronous
rectifier. Consider for instance a very ordinary buck converter with a
synchronous rectifier.

Although the MOSFET channel does wonders for decreasing the main conduction
voltage during the free wheeling period, there must still be dead time
between the two MOSFETs. The inductor doesn't really care if there is dead
time or not, the current must keep flowing (we assume continuous conduction
mode). So the syncronous rectifier MOSFET must turn off before the top
MOSFET turns on and it must turn on a little after the top MOSFET turns off.
During both of these time periods the inductor current must flow somewhere.
It is better for the current to flow through the co-packaged schottky diode
than the MOSFET body diode. The forward voltage drop is usually smaller,
and in the ideal case where the schottky handles all of the current and the
MOSFET body diode handles nothing, then the MOSFET body diode will not have
to undergo a reverse recovery event when the top MOSFET turns on again. In
practice the current will probably be somewhat shared between the schottky
and the MOSFET body diode and the reverse recovery of the body diode will
not be as bad as if it had handled all of the current itself.

So in this case this extra paralleled diode can indeed produce small but
still tangible efficiency benefits. I seem to recall reading some of
Maxim's datasheets and reading the figure of a 1% boost in efficiency for
some of their designs if you include the (optional) paralleled schottky
diode.


Nevertheless I'm very pleased MOSFET manufacturers have lately been
addressing the historically fairly slow body diodes of their MOSFETs. Many
of the newer lowish voltage (<80V) MOSFETs feature body diode reverse
recovery times of less than or in the vicinity of 50ns. Unfortunately the
higher voltage MOSFETs don't seem to be receiving as much of a boost in this
category as their lower voltage counterparts. This is too bad especially
since reverse recovery is dramatically more of a problem for higher voltage
applications. The larger reverse recovery times result in larger and more
prolonged reverse currents through the diodes. But then compounding this is
the voltage producing this current through the diode is much higher as well.
So the losses due to reverse recovery are typically not too bad for low
voltage but get dramatically worse for the higher voltage applications.
Fortunately the half and full bridge topologies are quite forgiving in
typical applications.
 
F

Fritz Schlunder

Jan 1, 1970
0
So as you can see the minority carrier lifetime is a very important figure.
The situation is rather complicated and it [the amount of charge stored that
must be forcefully removed by external electric fields at the time of when
the diode becomes reverse biased] depends on relative time frames being
considered. Further complicating the matter is also how fast the reverse
bias gets applied.

That explanation is all well and good but it does not account for the
main damaging effect of the reverse recovery when driven through an
inductance and that is the rapid production of a fairly huge reverse
voltage transient when the diode does recover. The inductance is driving
a constant reverse current through the diode while the diode voltage
drop remains at +Vd its forward bias voltage, so the external circuit
actually then forces a /buildup/ of reverse diode current even though
the reverse current is removing excess charge density from the PN
junction. So you have this really bad situation where diode reverse
current is increasing and diode excess charge density is decreasing. At
the intersection in time of sufficient diode recovery to no longer
support the instant reverse current, the diode rapidly begins to
stand-off the external circuit current which coming from an inductance
is a bad mix resulting in a reverse voltage peak limited only by the
inductance stored energy and the circuit stray capacitance- or the diode
reverse avalanches at a high enough voltage to cause rapid discharge of
the inductors energy.


Greetings Mr. Bloggs.

Fortunately there are a couple of things that make this less of a problem
than it may seem at first.

In your typical half or full bridge topologies where the above scenario
seems most likely to occur, consider the effects of the other MOSFET body
diodes. Suppose the scenario above is occurring in a typical half bridge
where the load is some inductive device. Suppose the MOSFET body diode on
the bottom MOSFET is undergoing reverse recovery. Indeed it would at first
seem that a large voltage might appear that would force the diode that is
recovering to avalanche breakdown.

But what about the other MOSFET body diode? If the voltage on the common
node between the two MOSFETs ever rose up to more than the supply voltage
(plus one diode drop) the inductive current would instead activate the body
diode of the other MOSFET. As a result the bottom MOSFET should not
avalanche. This is a very novel feature of the half/full bridge topologies.
The diodes all serve to protect each other such that no one should ever be
vulnerable to avalanche breakdown unless the main input power supply voltage
exceeds the breakdown voltage of the devices.

So what about other circuit arrangements? Well in those cases it is very
fortunate that many power MOSFETs are surprisingly avalanche rugged.
Typically the energy associated with this type of avalanche event would be
quite small, so no damage is likely to occur. Of course it may make you as
the engineer uncomfortable to put your circuit under an oscilloscope and
observe voltage spikes of say 240V on your 200V maximum rated MOSFETs, but
unless the peak current during avalanche is too high or the total energy
causes the junction temperature to exceed the maximum rating, then no damage
will occur.

In my opinion these "spikes" that one often hears of in power electronics
are vastly overrated. If you are unfamiliar with MOSFET avalanche and you
observe say 240V appearing across your 200V MOSFETs and then they
subsequently fail it is often very easy and tempting to blame the failure on
the spikes. Unfortunately these spikes just lend themselves too readily
towards being a scapegoat and can often obscure the true cause of device
failure (which in my experience is more often caused by lack of current
limiting leading towards massive excursions of the device outside of the
published safe operating area).
 
R

Robert Morein

Jan 1, 1970
0
legg said:
I missed this part before.

You mention two supply rails. What do you mean by symmetrical?

How are you connecting your 100V-rated parts into the circuit if the
supply rails can be identified by a +/-100V polarity?

RL

Sorry, the supply rails are +/- 50V.
 
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