Digital Logic Gates

[vick5821]

Hey guys, what does that means by the circled part ?

I am not so understand..

Thank you

 

[GreenGiant]

Active-Low is as stated in the surrounding text, the pin is active when it is low, so lets say you have a chip with an Active-Low enable if you supply a high to that pin (usually 3-5 volts) the chip will not be enabled. If you send that pin to ground then the chip will be enabled and will run as it is supposed to.

Same thing with Active-High but the other way around, you must provide the pin with a high reading (3-5 volts) in order to use what is connected to that pin


By the way I used that same book (Digital Fundamentals 9, by Floyd) a lot for my major in school

 

[TedA]

vick5821,

The terms "active high" / "active low" are used to relate the voltage state at a given point in a physical circuit to the associated Boolean, or binary, logic value, often termed "true / false" or "1 / 0".

A "high" signal is the more positive of the possible signal voltages. A "low" signal is the less positive, usually near zero volts, but in some cases, a negative voltage.

Whether a circuit node is active high or low depends on the context. In some cases the distinction can be pretty arbitrary.

Generally, if something happens when the signal is high, or on the signal's positive-going edge, the signal is considered active high.

I think the passage you copied is talking about schematic diagrams, and the symbols used on them.

If you are looking at symbols for common logic ICs, for instance, a reset pin may be drawn with a "bubble" to indicate that a low voltage on the pin causes reset. This would be active low.

Sometimes schematic diagrams for logic circuits attempt to show the logic high vs. logic low nature of each signal by adjusting the location of the "bubble" between inputs and outputs on the gate symbols. This may help understanding of the logic, but often leads to confusion, because the same type of gate may be drawn differently at different locations on the diagram. The more common practice is to use the exact symbols shown in the manufacturer's data sheets. Sometimes some notes are added to the diagram to explain the nature of various signals.

I hope that this makes sense. I wish I had time to work-up some example diagrams for you.

Ted

 

[vick5821]

Active-Low is as stated in the surrounding text, the pin is active when it is low, so lets say you have a chip with an Active-Low enable if you supply a high to that pin (usually 3-5 volts) the chip will not be enabled. If you send that pin to ground then the chip will be enabled and will run as it is supposed to.

Same thing with Active-High but the other way around, you must provide the pin with a high reading (3-5 volts) in order to use what is connected to that pin


By the way I used that same book (Digital Fundamentals 9, by Floyd) a lot for my major in school

I understand this..But what does that means by Active LOW input ?? Active HIGH output ?

 

[vick5821]

vick5821,

The terms "active high" / "active low" are used to relate the voltage state at a given point in a physical circuit to the associated Boolean, or binary, logic value, often termed "true / false" or "1 / 0".

A "high" signal is the more positive of the possible signal voltages. A "low" signal is the less positive, usually near zero volts, but in some cases, a negative voltage.

Whether a circuit node is active high or low depends on the context. In some cases the distinction can be pretty arbitrary.

Generally, if something happens when the signal is high, or on the signal's positive-going edge, the signal is considered active high.

I think the passage you copied is talking about schematic diagrams, and the symbols used on them.

If you are looking at symbols for common logic ICs, for instance, a reset pin may be drawn with a "bubble" to indicate that a low voltage on the pin causes reset. This would be active low.

Sometimes schematic diagrams for logic circuits attempt to show the logic high vs. logic low nature of each signal by adjusting the location of the "bubble" between inputs and outputs on the gate symbols. This may help understanding of the logic, but often leads to confusion, because the same type of gate may be drawn differently at different locations on the diagram. The more common practice is to use the exact symbols shown in the manufacturer's data sheets. Sometimes some notes are added to the diagram to explain the nature of various signals.

I hope that this makes sense. I wish I had time to work-up some example diagrams for you.

Ted

Thanks for the explanation. However, can I have some example so as to differentiate both type of logic for different position of the bubble (input/output)

Thank you