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"Chrystal load capacitance" for TB055 Microchip's example?

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Pete

Jan 1, 1970
0
I am completely newbie to microcontrollers, and that's probably why I
don't understand when Microchip's documentation for their sample
application TB055 says "C1 and C2 values selected according to crystal
load capacitance". The sample is at
http://ww1.microchip.com/downloads/en/AppNotes/91055C.pdf and the
picture is right at the beginning of the sample.

I have 20MHz PIC16C745, should I still use 6 MHz chrystal? What should
be C1 and C2 values? Or/and, how do I calculate the values of C1 and
C2?

Thanks!
 
P

Pooh Bear

Jan 1, 1970
0
Pete said:
I am completely newbie to microcontrollers, and that's probably why I
don't understand when Microchip's documentation for their sample
application TB055 says "C1 and C2 values selected according to crystal
load capacitance". The sample is at
http://ww1.microchip.com/downloads/en/AppNotes/91055C.pdf and the
picture is right at the beginning of the sample.

I have 20MHz PIC16C745, should I still use 6 MHz chrystal?

You can use an crystal frequency up to a MAX of 20MHz.

What should
be C1 and C2 values? Or/and, how do I calculate the values of C1 and
C2?

Values for C1 and C2 ( which will be the same ) can be found from the
crystal maufacturers data. Typically likely to be in the range 20-30pF.

Most 6MHz crystals I've come across require about 30pF. Higher frequencies
tend to require slightly less capacitance.


Graham
 
S

SioL

Jan 1, 1970
0
nb: The lower frequency PICs seem surprisingly easy to overclock. For
development purposes, I've run 4MHz units quite happily at 25MHz.
regards
john

How about AVR?

SioL
 
R

Reg Edwards

Jan 1, 1970
0
Take as an example a parallel xtl oscillator circuit. Parallel means that
the xtl is intended to oscillate with L and C in parallel as distinct from L
and C in series.

The narrow range of frequencies over which the xtl can be pulled by its
preset trimmer capacitor is affected by the uncertain input and stray
capacitances of the circuit components to which it is connected. The sum of
the circuit strays is the xtl's load capacitance into which the circuit is
required to work. The preset frequency trimmer capacitor is in parallel
with the load capacitance. Together they control oscillation frequency.

The xtl's oscillation frequency is specified by the customer before the
circuit is built, and before anyone knows accurately what the load
capacitance is. But the xtl manufacturer must be told a value of load
capacacitance to be connected across the xtl while its frequency is been
adjusted in the factory.

The value of the load capacitance is non-critical. Little more than a guess
is needed to estimate its value. Add a few extra pF for luck. Ideally, the
load capacitance used by the manufacturer during frequency adjustment should
be slightly greater than the value expected or guessed at by the circuit
designer.

All the manufacturer needs to know is some idea of the range of load
capacitances into which the xtl is intended to work. And leave the rest to
him. But don't over-estimate too much. Circuits with smaller values of
load capacitance tend to work more efficiently and reliably than with larger
values. Prefer 15 pF to 25 pF if you are absolutely certain 15 pF is big
enough.
 
D

Dave VanHorn

Jan 1, 1970
0
Same rules apply to PIC and AVR processors.

Applying crystals properly isn't that hard, but you DO need to read the data
sheet for the crystal.
 
J

john jardine

Jan 1, 1970
0
Pete said:
I am completely newbie to microcontrollers, and that's probably why I
don't understand when Microchip's documentation for their sample
application TB055 says "C1 and C2 values selected according to crystal
load capacitance". The sample is at
http://ww1.microchip.com/downloads/en/AppNotes/91055C.pdf and the
picture is right at the beginning of the sample.

I have 20MHz PIC16C745, should I still use 6 MHz chrystal? What should
be C1 and C2 values? Or/and, how do I calculate the values of C1 and
C2?

Thanks!

Microchip PIC Data sheets have been written by lunatics.
22pF seems to work well for most* crystals used with a PIC.
Use whatever crystal you have to hand. The PIC will happily run from DC
through 20MHz.
nb: The lower frequency PICs seem surprisingly easy to overclock. For
development purposes, I've run 4MHz units quite happily at 25MHz.
regards
john

* Tiny 32,768Hz watch crystals need maybe 150kohm of external series
resistance adding or they wont work.
 
J

john jardine

Jan 1, 1970
0
SioL said:
How about AVR?

SioL

Never had chance to try one :-(

Might change though as I'm getting a bit fed up having to spend hours
figuring out what bit settings mchip have buggered up each time they bring a
new chip out.
I keep reading the AVRs have a cleaner internal design.
(My 'perfect' chip would be something as versatile as the PIC/AVR but run
prog's like a Z80 on whiz)
regards
john
 
D

Dave VanHorn

Jan 1, 1970
0
I keep reading the AVRs have a cleaner internal design.

Indeed, they do.

No holes or pages in the ram.
Vectored ints
No pages in I/O
Three 16 bit pointer registers.
16 "W" register equivalents
16 more registers that aren't quite as nice.
Most instructions in happen in one clock.
 
S

Spehro Pefhany

Jan 1, 1970
0
I am completely newbie to microcontrollers, and that's probably why I
don't understand when Microchip's documentation for their sample
application TB055 says "C1 and C2 values selected according to crystal
load capacitance". The sample is at
http://ww1.microchip.com/downloads/en/AppNotes/91055C.pdf and the
picture is right at the beginning of the sample.

I have 20MHz PIC16C745, should I still use 6 MHz chrystal? What should
be C1 and C2 values? Or/and, how do I calculate the values of C1 and
C2?

Thanks!

To calculate C2 and C1:
Use the rated load capacitance of the crystal times two, minus 5pF,
round to the closest standard value. That will get you more than close
enough for most purposes. Eg. for a 12pF-load crystal, you'd use 18pF.

If you have problems with the oscillator starting under some
conditions with a given processor you may need to use a different
crystal.

Some crystals (usually tuning fork type or SMT crystals) have very
limited power capability and you may need to add a series resistor,
depending on the crystal and the power supply voltage to avoid
damaging the crystal, either immediately or by premature aging.
HC-49/U crystals can usually handle 1mW, whereas many SMT crystals are
rated at 100uW maximum.


Best regards,
Spehro Pefhany
 
S

SioL

Jan 1, 1970
0
Dave VanHorn said:
Indeed, they do.

No holes or pages in the ram.
Vectored ints
No pages in I/O
Three 16 bit pointer registers.
16 "W" register equivalents
16 more registers that aren't quite as nice.

All those registers and still its possible to run out of them :)
I'm not too good of a programmer, though.

I'm tempted to go the PIC way just for one particular project because
they seem to be available at higher speeds.

SioL
 
D

Dave VanHorn

Jan 1, 1970
0
All those registers and still its possible to run out of them :)
I'm not too good of a programmer, though.

Well. I always run out of registers. I start off, in small jobs, trying to
fit everything into the registers. If I can't then I start using SRAM. Some
apps I've been able to keep all register, then I can use the Tiny-11 at
$0.25 ea.
I'm tempted to go the PIC way just for one particular project because
they seem to be available at higher speeds.

Check carefully.
That 20 MHz PIC looks a lot like a 5 MHz AVR to me.
And that's before we deal with the single W register, paging, etc.
 
S

SioL

Jan 1, 1970
0
Dave VanHorn said:
Well. I always run out of registers. I start off, in small jobs, trying to fit
everything into the registers. If I can't then I start using SRAM. Some apps
I've been able to keep all register, then I can use the Tiny-11 at $0.25 ea.


Check carefully.
That 20 MHz PIC looks a lot like a 5 MHz AVR to me.
And that's before we deal with the single W register, paging, etc.

Thanks for clearing this up. How's ARM architecture? I've noticed
that even some of cheap ones use PLL clock multipliers resulting in quite
high clock, on the order of 60MHz. I wonder how many cycles per
instruction?

SioL
 
S

Spehro Pefhany

Jan 1, 1970
0
Thanks for clearing this up. How's ARM architecture? I've noticed
that even some of cheap ones use PLL clock multipliers resulting in quite
high clock, on the order of 60MHz. I wonder how many cycles per
instruction?

SioL

I think it depends on the core and the instruction (and maybe
additionally on pipeline issues). You have to felch out the
appropriate core manual (eg. from arm.com) and then add the info from
the hardware datasheet. Philips' LPC parts certainly look nice.



Best regards,
Spehro Pefhany
 
S

SioL

Jan 1, 1970
0
I think it depends on the core and the instruction (and maybe
additionally on pipeline issues). You have to felch out the
appropriate core manual (eg. from arm.com) and then add the info from
the hardware datasheet. Philips' LPC parts certainly look nice.
Best regards,
Spehro Pefhany

I've got the 2106 and the Nohau test board patiently waiting for the winter.
Hopefully I will find a bit more time to finally jump onto the AVR bandwagon.

I chose it for embedded RAM and curiosity factor (new platform) at the
time for one of my projects, but than other priorities came along.

SioL
 
P

Pooh Bear

Jan 1, 1970
0
Spehro said:
I think it depends on the core and the instruction (and maybe
additionally on pipeline issues). You have to felch out the
appropriate core manual (eg. from arm.com) and then add the info from
the hardware datasheet. Philips' LPC parts certainly look nice.

And inexpensive too. The improved execution time vs crystal freq is great. I'm
looking at one ( LPC762 ) right now for a new project.


Graham
 
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Spehro Pefhany

Jan 1, 1970
0
And inexpensive too. The improved execution time vs crystal freq is great. I'm
looking at one ( LPC762 ) right now for a new project.
Graham

If I'm reading this correctly, from the ARM7TDMI-S (rev 4) core manual
page 188, a 32-bit multiply-accumulate looks to be worst-case of 6
cycles with general 32-bit operands. So only 100nsec at full speed.

I like the fact they multiply the external oscillator up to 156-320
MHz internally before dividing down to get the clock.


Best regards,
Spehro Pefhany
 
S

SioL

Jan 1, 1970
0
Spehro Pefhany said:
If I'm reading this correctly, from the ARM7TDMI-S (rev 4) core manual
page 188, a 32-bit multiply-accumulate looks to be worst-case of 6
cycles with general 32-bit operands. So only 100nsec at full speed.

I like the fact they multiply the external oscillator up to 156-320
MHz internally before dividing down to get the clock.

Best regards,
Spehro Pefhany

I wonder how "constant" clock cycles are, a long pipeline could mean
longer delay with some commands/branches?

SioL
 
S

Spehro Pefhany

Jan 1, 1970
0
I wonder how "constant" clock cycles are, a long pipeline could mean
longer delay with some commands/branches?

SioL

Check the core manual- 3 cycles or 4 cycles for a branch type
instruction depending on the mode the processor is in and the
instruction (it's NOT data dependent if I read the manual correctly).
That's assuming no memory wait states, of course.


Best regards,
Spehro Pefhany
 
S

SioL

Jan 1, 1970
0
Check the core manual- 3 cycles or 4 cycles for a branch type
instruction depending on the mode the processor is in and the
instruction (it's NOT data dependent if I read the manual correctly).
That's assuming no memory wait states, of course.


Best regards,
Spehro Pefhany

Thanks. We'll discuss more when I get more involved into ARM.
Does look promising.

SioL
 
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