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Alarm circuit with and gates?

K

kash

Jan 1, 1970
0
I remember quite a log time ago someone built an intermittent alarm sound
circuit with an IC of 4 and gates (perhaps it was or or xor, not 100% sure)
Does anyone know what I'm talking about ? It may be that the 555 was
also used, not sure, can we create an oscillation with just a couple of and
gates?
 
J

John Fields

Jan 1, 1970
0
I remember quite a log time ago someone built an intermittent alarm sound
circuit with an IC of 4 and gates (perhaps it was or or xor, not 100% sure)
Does anyone know what I'm talking about ? It may be that the 555 was
also used, not sure, can we create an oscillation with just a couple of and
gates?
---
Yeah, sure.

Or maybe that was three and gates. Shouldn't an odd number give you the
inversion you need?

Or maybe that should be two nands, an xor and an and or an or or a nor?
Or not? I don't remember, it's sooooo confusing.
 
K

kash

Jan 1, 1970
0
John Fields said:
---
Yeah, sure.

Or maybe that was three and gates. Shouldn't an odd number give you the
inversion you need?

Or maybe that should be two nands, an xor and an and or an or or a nor?
Or not? I don't remember, it's sooooo confusing.

Come to think of it, yes I do think it was nand actually. They must have been
all of the same type since this is how they come as IC's.
I wish I had the circuit, perhaps you could post a circuit?
 
K

kash

Jan 1, 1970
0
Ken Taylor said:
Search engines reveal all.
http://www.robotroom.com/InfraredTransmitter.html
for *one* example circuit.

1. Yes, it's good, why do we use the extra two top gates, is it for isolation
from the oscillation part, if so, why use both top nands, one should be
enough?

2. Now how can we get an on-off oscillation? maybee we can use the
top nands as an oscillator of about 1hz to control the Enable of the
bottom oscillator, but then we won't have en extra gate as a buffer
 
K

Ken Taylor

Jan 1, 1970
0
kash said:
1. Yes, it's good, why do we use the extra two top gates, is it for isolation
from the oscillation part, if so, why use both top nands, one should be
enough?

2. Now how can we get an on-off oscillation? maybee we can use the
top nands as an oscillator of about 1hz to control the Enable of the
bottom oscillator, but then we won't have en extra gate as a buffer

Using digital stuff in this way is evil, but that's just a philospohical
point. :) The two top NAND's are cleaning up the waveform and buffering. To
switch it on and off at, say, 1Hz, replace the 'make' switch with another
similar circuit set for 1Hz.

Cheers.

Ken
 
S

Steven Murray

Jan 1, 1970
0
Chances are it was the CD4093.
A schmitt trigger quad dual input NAND.
It has a wide supply range, also.

In terms of functionality within one part, you can do an awful
lot with this single, cheap, chip. One NAND alone can be a gated
oscillator, for instance, or you can cross couple two of them to
get an RS flip flop while still retaining schmitt trigger inputs.

No, I can't post circuits - as Ken Taylor said - use search engines.
 
N

N. Thornton

Jan 1, 1970
0
Steven Murray said:
Chances are it was the CD4093.
A schmitt trigger quad dual input NAND.
It has a wide supply range, also.

In terms of functionality within one part, you can do an awful
lot with this single, cheap, chip. One NAND alone can be a gated
oscillator, for instance, or you can cross couple two of them to
get an RS flip flop while still retaining schmitt trigger inputs.


Instead of using a 4x NAND, use a hex schmitt invertor. Lots more
games you can play per chip that way.

Regards, NT
 
J

John Fields

Jan 1, 1970
0
Thanks for the circuit (a circuit is better than a 1000 words)
---
Thanks, but there's a mistake in the timing diagram. With '132's in the
circuit shown, the timing will look like this:


______________________ ___________
Y1_____| |________________________|

______ _ _ _ _ _ _________________________ _ _
Y2 |_| |_| |_| |_| |_| |_| |_| |_| |_


For the timing to look like this:


______________________ ___________
Y1____| |________________________|

_ _ _ _ _ _ _ _ _
Y2____| |_| |_| |_| |_| |_| |_________________________| |_| |_| |_

The gates in the circuit need to be HC 7002's (Schmitt trigger NORs)
 
J

John Fields

Jan 1, 1970
0
Well, to produce a little alarm it really doesn't matter if it starts up
or down does it?
---
That's not the point. What matters is what happens when it comes to
rest. Using NANds, the output of the circuit will be high when it's
inactive, meaning that if you're low-side driving a DC coupled load
connected to the+ rail it will always be on when the circuit isn't
oscillating. By using Nors the output always goes low when the circuit
is idle.
 
K

kash

Jan 1, 1970
0
John Fields said:
---
That's not the point. What matters is what happens when it comes to
rest. Using NANds, the output of the circuit will be high when it's
inactive, meaning that if you're low-side driving a DC coupled load
connected to the+ rail it will always be on when the circuit isn't

What is a low-side DC coupled load ?
 
J

John Fields

Jan 1, 1970
0
What is a low-side DC coupled load ?

I have no idea, but what I was talking about looks like this, where the
load is driven by connecting and disconnecting it from the low side
(GND) of the supply. In this case, the transistor is called a low-side
switch.

Assuming that you want a gated oscillator which oscillates when an input
line is in one state and doesn't oscillate when the input line is in the
opposite state, looking over this circuit a little more closely yields
that is has problems for your application whether NANDs or NORs are
used.

+V
|
[LOAD]
ON/OFF>-------A |
NAND Y1--+-------A C
+----B | NAND Y2--+--[R]---B
| | +----B | E
+---[R]----+ | | |
| +---[R]----+ GND
[C] |
| [C]
GND |
GND

Looking at a truth table for the circuit yields, for NANDs:

ON/OFF Y1 Y2
------|----|----
0 1 OSC
1 OSC OSC

And for NORs,

ON/OFF Y1 Y2
------|----|----
0 OSC OSC
1 0 OSC

So no matter what, the output will either be oscillating continuously or
oscillating periodically!


The following will work, albeit with a price increase of an extra chip!
I'm sure there are other thriftier configurations which will work, so
why don't you get out a pecil and some paper and see whether you can
figure something out?

+V
|
[LOAD]
ON/OFF>-------A |
NAND Y1--+-------A C
+----B | NOR Y2--+--[R]---B
| | +----B | E
+---[R]----+ | | |
| +---[R]----+ GND
[C] |
| [C]
GND |
GND

ON/OFF Y1 Y2
------|----|----
0 1 O
1 OSC OSC
 
J

Jim Thompson

Jan 1, 1970
0
What is a low-side DC coupled load ?

I have no idea, but what I was talking about looks like this, where the
load is driven by connecting and disconnecting it from the low side
(GND) of the supply. In this case, the transistor is called a low-side
switch.

Assuming that you want a gated oscillator which oscillates when an input
line is in one state and doesn't oscillate when the input line is in the
opposite state, looking over this circuit a little more closely yields
that is has problems for your application whether NANDs or NORs are
used.

+V
|
[LOAD]
ON/OFF>-------A |
NAND Y1--+-------A C
+----B | NAND Y2--+--[R]---B
| | +----B | E
+---[R]----+ | | |
| +---[R]----+ GND
[C] |
| [C]
GND |
GND

Looking at a truth table for the circuit yields, for NANDs:

ON/OFF Y1 Y2
------|----|----
0 1 OSC
1 OSC OSC

And for NORs,

ON/OFF Y1 Y2
------|----|----
0 OSC OSC
1 0 OSC

So no matter what, the output will either be oscillating continuously or
oscillating periodically!


The following will work, albeit with a price increase of an extra chip!
I'm sure there are other thriftier configurations which will work, so
why don't you get out a pecil and some paper and see whether you can
figure something out?

+V
|
[LOAD]
ON/OFF>-------A |
NAND Y1--+-------A C
+----B | NOR Y2--+--[R]---B
| | +----B | E
+---[R]----+ | | |
| +---[R]----+ GND
[C] |
| [C]
GND |
GND

ON/OFF Y1 Y2
------|----|----
0 1 O
1 OSC OSC

See "CMOS-Osc-NoClip.pdf" on the S.E.D/Schematics page of my website.
Changing one inverter to a gate will allow stopping and starting.

...Jim Thompson
 
R

roma

Jan 1, 1970
0
kash said:
I remember quite a log time ago someone built an intermittent alarm
sound circuit with an IC of 4 and gates (perhaps it was or or xor, not
100% sure) Does anyone know what I'm talking about ? It may be that
the 555 was also used, not sure, can we create an oscillation with
just a couple of and gates?

see page 18 http://members.shaw.ca/roma
roma
 
K

kash

Jan 1, 1970
0
No no, this is absolutely fine, I don't need an on/off switck, just
need an intermittant alarm.

John Fields said:
What is a low-side DC coupled load ?

I have no idea, but what I was talking about looks like this, where the
load is driven by connecting and disconnecting it from the low side
(GND) of the supply. In this case, the transistor is called a low-side
switch.

Assuming that you want a gated oscillator which oscillates when an input
line is in one state and doesn't oscillate when the input line is in the
opposite state, looking over this circuit a little more closely yields
that is has problems for your application whether NANDs or NORs are
used.

+V
|
[LOAD]
ON/OFF>-------A |
NAND Y1--+-------A C
+----B | NAND Y2--+--[R]---B
| | +----B | E
+---[R]----+ | | |
| +---[R]----+ GND
[C] |
| [C]
GND |
GND

Looking at a truth table for the circuit yields, for NANDs:

ON/OFF Y1 Y2
------|----|----
0 1 OSC
1 OSC OSC

And for NORs,

ON/OFF Y1 Y2
------|----|----
0 OSC OSC
1 0 OSC

So no matter what, the output will either be oscillating continuously or
oscillating periodically!


The following will work, albeit with a price increase of an extra chip!
I'm sure there are other thriftier configurations which will work, so
why don't you get out a pecil and some paper and see whether you can
figure something out?

+V
|
[LOAD]
ON/OFF>-------A |
NAND Y1--+-------A C
+----B | NOR Y2--+--[R]---B
| | +----B | E
+---[R]----+ | | |
| +---[R]----+ GND
[C] |
| [C]
GND |
GND

ON/OFF Y1 Y2
------|----|----
0 1 O
1 OSC OSC
 
J

John Fields

Jan 1, 1970
0
See "CMOS-Osc-NoClip.pdf" on the S.E.D/Schematics page of my website.
Changing one inverter to a gate will allow stopping and starting.

---
"Gated" oscillator, Jim.

A high (or low) in will allow the thing to run and output a particular
frequency for a while and then nothing for a while and then...

OTOH, a low (or a high) input will shut it down.

Exchanging a gate for an inverter in your circuit will allow stopping
and starting, but it won't allow stopping and starting on a periodic
basis unless there's another oscillator in there toggling the start/stop
line and an input to control the gating oscillator and the "off" state
of the output.
 
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