What is a low-side DC coupled load ?
I have no idea, but what I was talking about looks like this, where the
load is driven by connecting and disconnecting it from the low side
(GND) of the supply. In this case, the transistor is called a low-side
switch.
Assuming that you want a gated oscillator which oscillates when an input
line is in one state and doesn't oscillate when the input line is in the
opposite state, looking over this circuit a little more closely yields
that is has problems for your application whether NANDs or NORs are
used.
+V
|
[LOAD]
ON/OFF>-------A |
NAND Y1--+-------A C
+----B | NAND Y2--+--[R]---B
| | +----B | E
+---[R]----+ | | |
| +---[R]----+ GND
[C] |
| [C]
GND |
GND
Looking at a truth table for the circuit yields, for NANDs:
ON/OFF Y1 Y2
------|----|----
0 1 OSC
1 OSC OSC
And for NORs,
ON/OFF Y1 Y2
------|----|----
0 OSC OSC
1 0 OSC
So no matter what, the output will either be oscillating continuously or
oscillating periodically!
The following will work, albeit with a price increase of an extra chip!
I'm sure there are other thriftier configurations which will work, so
why don't you get out a pecil and some paper and see whether you can
figure something out?
+V
|
[LOAD]
ON/OFF>-------A |
NAND Y1--+-------A C
+----B | NOR Y2--+--[R]---B
| | +----B | E
+---[R]----+ | | |
| +---[R]----+ GND
[C] |
| [C]
GND |
GND
ON/OFF Y1 Y2
------|----|----
0 1 O
1 OSC OSC