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A few questions on electronics

Rajinder

Jan 30, 2016
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Hi all,
I have a few questions that I wonder if you could help me with.
1. If a electric MIC has an output impedance of 2.2K, does that mean anything I connect to it must have an input impedance greater than 2.2k?
2. I need the MIC output to be coupled then to an opamp, the value of the capacitive reactance is given by 1/(2*3.142*freq*c). I need to amplify signals in the 2-3khz range. If I use this in the equation and select a value of C, am I looking for the reactance to be 0R or close to this?
3. If I have a 4 layer PCB, with components on both sides of the board is SMD on one side and through hole on the other, what advantage would a 6 layer PCB give?
4. I am using a shift register with Master clear as active low. Normally I would tie this to VDD via a 10K pull up. However, if I wanted this to be configurable by software, ie software to pull this signal low, would I still use the 10K pull up and then a FET to drive this signal low. The FET having a resistor between gate and source to prevent false triggering and then connected to an IO pin of a micro? I am not sure how to calculate the resistor to drive the gate, can anybody help. Note this will be a logic level FET.
Thanks for your help
Raj
 
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Colin Mitchell

Aug 31, 2014
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1. If the output of the mic is 2k2, and you deliver the signal into 2k2, the signal will be attenuated to 50%. That's why you try to make the "load" as high as possible.
2. Normally the coupling cap is 22n to 100n.
3. Only use 6 layer if you cannot get connections (tracks, traces) from one end of the board to another.
4. Use anything from 470R to 10k.
 

Rajinder

Jan 30, 2016
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So for the FET, am I safe today I can connect gate to 0V via a 10K pull down resistor. Then a 470R from the gate going to the micro I/O. But how do you calculate these values from FET characteristics and micro I/O output drives?
 

BobK

Jan 5, 2010
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2. Try calculating the capacitor that will have 0Ω reactance. You would never need anything near 0Ω. About 1/10 of the input impedance of the next stage at the lowest frequency of interest would be reasonable.

4. You can connect the master clear directly to the micro output, and no pullup is necessary unless you need it held high during the micro startup, which seems opposite, you would more likely want it held low. You only need a FET if you are driving something that requires more current than the micro output can provide. This is typically 20mA.

Bob
 

Rajinder

Jan 30, 2016
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Hi Bob,
Thanks for your help. I wasn't sure the state of the micro I/O lines on power up. So hence the pull up, to make the master clear high, disabling it. I wanted the FET to give me control of this line, so that I can pulse this low to reset the shift register anytime I want.
My requirements are 1. Have a known state of master clear on power up. 2. To be able to under software control to reset the shift register. What would be your suggestion, it is a PIC18F4520 and 74HC595 register.
Thanks in advance.
Best regards,
Raj
 

Rajinder

Jan 30, 2016
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The shift register is connected to a ULN2003LV to drive 5V relay coils. So I didn't want them to chatter on power up.
 

BobK

Jan 5, 2010
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I would suggest a pullup and direct connection to the PIC output port. On startup, set that pin to output and high. When you want to reset, set the pin low, wait for some period, then set it high again.

Are you sure you do not want a pulldown instead though? This would disable the shift register from doing anything until the micro had started up and set it high, at which point it would be reset.

Bob
 

Rajinder

Jan 30, 2016
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The master clear is a active low signal. So I thought to disable it would need to be a high, then reset via a FET connected to the pullup, to drive the pin low when we wanted to reset.
 

BobK

Jan 5, 2010
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You have understood nothing I have said. Please go back and read my posts again.

Bob
 
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