Hi there...
I've been working on a project for an SMPS in the KW range for some months now and I keep running into different problems. Much research in books and online solved some of them, but I'm stuck now and I thought the expertise here might give some insight. I studied EE in college but most of it was in digital design, so power circuits is more self-taught. I've done some linear power supply design and also a lighter SMPS with simple topology, but this high power and different design has been a beast. I'm also working on a PFC stage which I will include (although I haven't gotten that to work yet...any input would be greatly appreciated if you get a chance).
Any insight on my design is good. If you have a design example for this power range or a link to one, I'd be happy to try that, although I haven't found any through much searching.
My application:
Charging very large capacitors (.8 F x 3 in parallel) in a short time (<1s) up to 24 or 48V. To do that, I'd like to source up to 30-40A current.
Here are my specs:
Input voltage: 110Vac through a voltage doubler and rectifier (not shown), so 340 Vdc onto DC+ and DC- (as labeled on schematic)
Output voltage: 24Vdc
Max current: 40A
My problem:
I manage input Vac using a variac, and then either load it with an uncharged cap (~2000 uF) or a resistor 10R. Either way, when I increase input voltage to near the max (ie. normal US 110Vac), I start to blow the FETS. They are heatsinked and don't heat up too much, just suddenly I blow the fuse and testing shows that 1-4 of the FETs are now shorted on all 3 pins.
I have a cheap o-scope can it's ground line is grounded to earth, so I can't watch what's happening between the gate transformers and my output (the voltage doubler sends DC- below 0 and sparks flew when I tried before I read the o-scope manual).
I'm using a full-bridge topology with some modifications to improve the MOSFET switching and control noise on the gate. I don't know if those are causing problems. This includes the RC snubbers across the FETS and the transistor between the FET gate and source to drop Vgs quicker on the switch off (ie. bypass the transformer inductance)
Thanks in advance!
-Kevin
SCHEMATICS:
hhmm..the upload converts to poor quality jpg, and I can't put links in here....I have them posted on my site at the address:
vasefi.net/smps.png
vasefi.net/pfc.png
PS. I know my schematic is all backwards...sry this is what happens when you start a design with no knowledge and then try to add to it for months.
I've been working on a project for an SMPS in the KW range for some months now and I keep running into different problems. Much research in books and online solved some of them, but I'm stuck now and I thought the expertise here might give some insight. I studied EE in college but most of it was in digital design, so power circuits is more self-taught. I've done some linear power supply design and also a lighter SMPS with simple topology, but this high power and different design has been a beast. I'm also working on a PFC stage which I will include (although I haven't gotten that to work yet...any input would be greatly appreciated if you get a chance).
Any insight on my design is good. If you have a design example for this power range or a link to one, I'd be happy to try that, although I haven't found any through much searching.
My application:
Charging very large capacitors (.8 F x 3 in parallel) in a short time (<1s) up to 24 or 48V. To do that, I'd like to source up to 30-40A current.
Here are my specs:
Input voltage: 110Vac through a voltage doubler and rectifier (not shown), so 340 Vdc onto DC+ and DC- (as labeled on schematic)
Output voltage: 24Vdc
Max current: 40A
My problem:
I manage input Vac using a variac, and then either load it with an uncharged cap (~2000 uF) or a resistor 10R. Either way, when I increase input voltage to near the max (ie. normal US 110Vac), I start to blow the FETS. They are heatsinked and don't heat up too much, just suddenly I blow the fuse and testing shows that 1-4 of the FETs are now shorted on all 3 pins.
I have a cheap o-scope can it's ground line is grounded to earth, so I can't watch what's happening between the gate transformers and my output (the voltage doubler sends DC- below 0 and sparks flew when I tried before I read the o-scope manual).
I'm using a full-bridge topology with some modifications to improve the MOSFET switching and control noise on the gate. I don't know if those are causing problems. This includes the RC snubbers across the FETS and the transistor between the FET gate and source to drop Vgs quicker on the switch off (ie. bypass the transformer inductance)
Thanks in advance!
-Kevin
SCHEMATICS:
hhmm..the upload converts to poor quality jpg, and I can't put links in here....I have them posted on my site at the address:
vasefi.net/smps.png
vasefi.net/pfc.png
PS. I know my schematic is all backwards...sry this is what happens when you start a design with no knowledge and then try to add to it for months.
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