Tohoku University Researchers Propose Replacement for SRAM with Low Power MRAMs

6 months ago by Luke James

In early December, Japanese researchers demonstrated a high-speed spin-orbit-torque (SOT) magnetoresistive random access memory cell compatible with 300 mm Si CMOS technology.

Announced at the 2019 IEEE International Electron Devices Meeting in San Francisco, the development could pave the way for the replacement of SRAM with low power magnetoresistive random access memories (MRAMs)

Many large semiconductor fabricators have announced that they are ready for mass production of STT-MRAM as an alternative to eFlash, so the race is on to perfect it. 

 

Achieving Lower Power Consumption with MRAMs

The widely-used CMOS-based memories such as embedded Flash memory (eFlash) and static random-access memory (SRAM) consume too much power for modern applications that require low-power solutions. To lower power consumption while maintaining high performance, MRAMs have been proposed and developed as a potential solution, with spin-transfer torque MRAMs (STT-MRAMs) being the most popular.

Researchers are hoping to replace SRAM with MRAM, but for this to happen, MRAM must achieve high-speed operation above 500 MHz. To meet the demand, an alternative MRAM, SOT-MRAM, with several advantages for high-speed operation, was proposed. 

For SOT-MRAM to replace SRAM, it must demonstrate high performance on a 300mm CMOS substrate. It is also necessary to develop the integration process for SOT-MRAM, for example, 400°C annealing which is a requirement of the standard CMOS process. 

 

Schematic of the STT-MRAM cell developed by Tohoku University.

A schematic of the STT-MRAM cell developed by Tohoku University researchers. Image Credit: CIES, Tohoku University via EurekAlert.

 

SOT-MRAM Compatible with 300mm Si CMOS

Led by Professors Tetsuo Endoh and Hideo Ohno—the current president of Tohoku University—the Japanese research team has developed an integration process for SOT devices compatible with 55nm CMOS technology and fabricated SOT devices on 300mm CMOS substrates.

The Japanese research team’s SOT device achieved high-speed switching and a high thermal stability factor, 0.35 ns, and E/kBT = 70 respectively, which the research team says is enough for high-speed non-volatile memory applications. It is also capable of withstanding annealing at 400°C. Using these devices, the researchers created a complete SOT-MRAM memory cell.

The research team’s achievements bring SOT-MRAM closer to being implemented within commercial applications, paving the way for SRAM’s replacement with a more robust and future-proof solution that will contribute to electronics with higher performance benchmarks and lower power consumption levels.

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