Cadence and Broadcom Collaborate on Developing Semiconductors for Next Gen Industrial Applications

about 3 weeks ago by Luke James

Cadence Design Systems is expanding its collaboration with Broadcom to create semiconductor solutions targeted towards next-generation wireless and industrial applications, broadband, and enterprise storage.

Cadence Design Systems has recently announced the expansion of its collaboration with Broadcom to build upon current successful 7nm and create 5nm semiconductor products using its proprietary digital implementation solutions. With Cadence’s solutions in place, it is said that Broadcom will be able to further augment engineering productivity and improve silicon performance and power.

 

A figure of an advanced node design by Cadence Design Systems.

Density gradiant effect avoidance figure. Image Credit: Cadence Design Systems.

 

Combining Silicon and Advanced-Node Designs

In a statement released on Cadence’s own website, Yuan Xing Lee, vice president and head of Central Engineering at Broadcom, stated, “As a global infrastructure technology leader, we’re committed to delivering innovative products that enable our customers to excel in their respective markets. With Cadence as a key silicon design partner, we’re able to achieve our power and performance goals and provide our customers with the highest quality solutions that they’ve come to expect from us.”

Cadence’s president, Dr. Anirudh Devgan, said, “We’ve collaborated with Broadcom for many years, and our expanded partnership on advanced-node design development is a result of the series of successes we’ve had together over time and our overall digital technology leadership. Given the continued proliferation of networking, broadband, enterprise storage, wireless and industrial applications, we’re dedicated to ensuring that Broadcom achieves design excellence using our latest toolsets to fuel design innovation.”

Cadence’s digital implementation solutions form part of the company’s broader digital suite, which provides optimal power, performance, and area (PPA) alongside reduced turnaround time and time to market.

They also support Cadence’s Intelligent System Design strategy, an initiative designed to empower engineers to create innovative, intelligent, and highly differentiated system-on-chip (SoC) products that excel and are more efficient. 

Comments