Silicon integrated circuits are quickly approaching the maximum workable density of transistors that can be placed onto a single chip. This limits potential improvements and leaps forward in design due to the theoretical ‘maximum’ power that will inevitably be reached.
However, thanks to the work of a team of University of Michigan (U-M) engineers, a new approach called ‘transistor stacking’ is being hailed as the solution to this problem.
An illustration of a step in the production stacking process developed by the researchers. Injecting a zinc-tin-solution atop the spinning silicon chip. Image Credit. University of Michigan.
The U-M engineers have managed to stack the second layer of transistors directly on top of an existing silicon chip. They propose that this design could potentially remove the design for a second chip that converts between high- and low-voltage signals. In current designs, these sit between the low-voltage processing chips and higher-voltage user interfaces.
Given that computing power essentially ‘doubles’ per dollar every two years and that silicon transistors continue to shrink in size to become more affordable and power-efficient—something known as Moore’s Law—and that voltages at which these transistors operate at have fallen, there is a pressing need to find a solution before maximum transistor density is reached.
Becky Peterson, U-M’s project leader, said, that their “…approach can achieve better performance in a smaller, lighter package,”.
The second layer of transistors can also handle higher voltages. This is key because high voltages easily damage silicon transistors, and this only grows easier as transistors shrink in size and cost as per Moore’s Law. Thus, for example, the need for an extra chip that acts as a converter between low-voltage signals and high-voltage user interfaces—as seen in current state-of-the-art processors—is eliminated.
“This enables a more compact chip with more functionality than what is possible with only silicon,” said Youngbae Son, a recent U-M doctoral graduate in electrical and computer engineering.
The zinc-tin-oxide semiconductor used in the research study, appearing as five mottled gray layers in an electron microscope image. Image Credit: University of Michigan.
How They Did It
Peterson’s U-M team successfully stacked the second layer of transistors on the same chip by utilizing a different type of semiconductor, an amorphous metal oxide. To apply this semiconductor layer to the silicon without causing damage, the chip was covered with a zinc and tin solution which was spun to create an even protective coating.
Following this, the chip was baked briefly to dry it out. The process was then repeated to create a layer of zinc-tin-oxide around 75 nanometers thick. During a third and final bake, the layer was created when the metals bonded to oxygen in the air.
The team used the zinc-tin-oxide layer to make thin-film transistors that can handle higher voltages than the silicon beneath it. To enable the zinc-tin-oxide transistor to communicate with the underlying silicon, the team added tow circuit elements using the zinc-tin-oxide: a vertical thin-film diode and a Schottky-gated transistor.
The two types of zinc-tin-oxide transistors are connected to make an inverter that converts between the low voltage used by the silicon and the higher voltages used by other components.
This major advancement in silicon integrated chip technology has the potential to solve the transistor density problem and revolutionize transistors and the methods used by engineers to build complex devices.