Why do JFET/FET amps experience the miller effect? There isn't any feedback

Discussion in 'Electronic Design' started by Stephen, Apr 12, 2005.

1. StephenGuest

Could someone explain why a self biasing JFET amp (for example:
http://www.mission-technology.com/ELECLABS/images\21lb10_1.gif) would
display the miller effect? There isn't any feedback, so there
shouldn't be any miller effect.. right?
of a impedance across a negative gain device."
http://www.odyseus.nildram.co.uk/RFIC_Theory_Files/Miller_Effect.pdf

In Erno Boberly's great article "JFETS: The New Frontier Part I"
(http://www.tkhifi.com/div/Erno_Borbely_fet_articel_1.pdf).. he
mentions how the JFET amp can have this huge input capacitance with a
large gain. But.. these amps don't have feedback... so why?

Thanks
Stephen

2. Larry BrasfieldGuest

There is a capacitance between the FET drain and gate.
This arises due to the fact that the gate and channel are
separated by only a PN junction. That capacitance acts
as a feedback element. So your premise, "don't have
feedback", does not apply. (Your conclusions would
be sensible, otherwise.)

3. John WoodgateGuest

I read in sci.electronics.design that Stephen <>
'Why do JFET/FET amps experience the miller effect? There isn't any
feedback', on Tue, 12 Apr 2005:
There IS feedback, via the drain-gate capacitance. This is analogous to
the very original Miller effect, due to the anode/plate-control grid
capacitance in triode valves/tubes.

Note and admire the bilingual exegesis. (;-)

If the gate voltage goes down by a small amount, the drain voltage goes
up by that amount multiplied by the stage gain. So the capacitor demands
charge as if it had a capacitance larger by a factor equal to the stage
gain.

4. John LarkinGuest

It also arises from the capacitance of the silly plastic breadboard
thingie.

John

5. StephenGuest

good point! Thanks to all.

What? ?8-\