Connect with us

Why can't cache memory size be bigger?

Discussion in 'General Electronics Discussion' started by Tristan369, May 27, 2021.

Scroll to continue with content
  1. Tristan369

    Tristan369

    32
    7
    Oct 29, 2020
    I've read a few answers online to this question, and the answer seems to be that the way in which we access memory from cache is slower the bigger the cache is.

    But then why don't we just access memory differently? And how exactly is the memory accessed in cache anyway?

    Why can't you just have, say, a 64-bit bus with a register at every address? You simply access the memory by entering the right address into the bus, and each register has some logic on the bus lines to determine whether it is on or off. Any register could be accessed in a single clock cycle no matter how large the memory is, right?

    The only thing I can think of is maybe the physical size of the memory and the speed of electrons are also a limitation? Or I just don't understand why my idea wouldn't work. Thank you.
     
  2. bertus

    bertus Moderator

    2,025
    758
    Nov 8, 2019
    Tristan369 likes this.
  3. Tristan369

    Tristan369

    32
    7
    Oct 29, 2020
    Thank you, that can help me understand how the memory is accessed, but I still don't know why we do it. My way of doing it would be way faster and eliminates the whole idea of a "cache miss."
     
  4. bertus

    bertus Moderator

    2,025
    758
    Nov 8, 2019
Ask a Question
Want to reply to this thread or ask your own question?
You'll need to choose a username for the site, which only take a couple of moments (here). After that, you can post your question and our members will help you out.
Electronics Point Logo
Continue to site
Quote of the day

-