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When to use Pull Up/Down resistors on CMOS

Discussion in 'Electronic Design' started by steveandaugie, Aug 10, 2007.

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  1. Should every CMOS input be pulled high or low? What about inputs fed
    by other CMOS outputs? Should unused outputs be allowed to float or
    do they need to be tied to a known signal?
     
  2. D from BC

    D from BC Guest


    Ans. 1: Depends on what's driving the input...
    Ans. 2: Generally none.
    Ans. 3: Best not to float.

    D from BC
     
  3. Yes, every CMOS input should be tied either high or low, or driven by
    another gate, your pick, just don't leave inputs floating.
    No problem and no pull-up needed, unless the input to the gate driving
    the input is left floating!
    If the driving gate is an "open drain" type however, then you need a
    pull-up.

    Also, as a general rule you don't connect the inputs of unused gates
    to another output that switches, as this just increases the total chip
    current consumption.
    You can leave outputs unconnected. Tying them with pull-ups can just
    waste unnecessary current, there is no need to do this.

    Dave.
     
  4. Benj

    Benj Guest

    Nobody explained why there is this rule so for your information: CMOS
    inputs are VERY high impedance. Therefore if left floating they can
    pick up charge and develop some voltage. The problem comes when they
    develop a voltage in the middle of the logic range. In the middle
    switching range the current through the transistors in the given gate
    tend to draw much more current than when the input is full high or
    full low. Therefore the distinct advantage of CMOS using little
    current in static cases is lost. So if, say, you were developing some
    low speed battery powered logic, some floating gates could very
    drastically shorten battery life *even if those gates were not
    connected to anything but power*!
     
  5. neon

    neon

    1,325
    0
    Oct 21, 2006
    jONES IS RIGHT but he forget to mention that usualy they may begin to oscillate at very hi frequency [it depends on how trashy is gnd signals and so forth] generating inerference and heat. a good working system can become inoperative because of it.
     
  6. Thanks for everyone's answers. They are mostly as I expected but I
    was losing confidence after placing nth resistor in circuit. Other
    things I've read covered the topic but didn't necessarily leave me
    with definitive answers. I do have one more question along these
    lines though. If I have several inputs of the same type (like presets
    or resets) that will not be switched, can they share a pull up/down
    resistor or do they need to be isolated from each other as well?

    Maybe I should be asking this in sci.electronics.basics. Thanks for
    your time.
     
  7. Read the datasheets carefully. The standard CMOS input requires
    pullup or pulldown to keep the gate from a power-wasting and/or
    oscillating middle state. However, some devices have "weak" pullups
    built in to simplify this task (adding an external pullup will not
    hurt the part but will cost power consumption, resistor cost and board
    space); and some programmable CMOS parts (FPGAs, uCs, etc) allow
    selection of internal pullups/pulldowns as an option.
     
  8. D from BC

    D from BC Guest

    Unused CMOS inputs can be tied to a com or power rail depending on
    the logic needed for proper operation.

    For example, if you're driving your CMOS input with say an open
    collector comparator and need to drive 2 CMOS inputs ...then yeah..it
    looks like a pull up is shared.

    The CMOS output configuration is push pull. So CMOS outputs driving
    CMOS inputs don't need any resistors on the path...
    D from BC
     
  9. me

    me Guest

    You can tie all of the inputs high with one resistor (withing reason)
     
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