Hi all,
A quick question when and where should i use decoupling capacitors.
Circuits that i have built at uni have always been giving to us and
there are often these decoupling capacitors but it is never be
explained why they are used and when they should be used. Could anybody
shine a light on this subject?
Thanks
Wayne
prolly gonna get shot to bits on this one but here goes...
on the power rails of *anything* switching... as close to the power
pins of whatever it is you are decoupling as possible.
In a perfect world, logic is a nice clean 0-1-0 swing, but in reality
they are still analogue device and with TTL especially, the inrush
currents when the transistor saturate can cause dips and spikes on the
supply rails... very short, but they can get picked up by other
devices and cause malfunctions of your circuit. the correct D-cup
ahould remove normal glitches like this - you can still get rogue
chips or batches that will wallop the power whatever realistic
capacitor you use - these should be located and junked but this is
usually as part of test dammit! >
(
OK.. I know this is a tad extreme, but you can't really have too many
and with 10nf at $0.002 (in suff. qtys) if you have room you should do
it.
Old style TTL was really horrible and used to spike the rails all the
time. I rememeber s100 bus boards with rows and rows of the stuff and
every one had a 10nF at the end - you can get capacitors that fit the
standard 14 & 16 pin (more?) DIL footprint and fit underneath chips...
not sure if this is a good idea - obviously the density goes up but
it's more hassle if you get a failure.