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What is the Feature Size In Fab Process???

Discussion in 'Electronic Components' started by JLD, Sep 28, 2004.

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  1. JLD

    JLD Guest

    Hello all.
    I have a question about the fab process of ICs but really about some
    of the terminology.
    When I read an article in a EE trade journal and it says a 90nm
    process what does that exactly mean? I know about Moore's law and how
    chips are getting smaller and smaller (more and more
    transistors/chip), 1.8um > 1.3um > ... > 90nm > 65nm > ...
    I have heard about the size of the node and the feature size.

    1) Is the feature size the physical size of a single FET? Or is the
    feature size the physical size of a feature of the FET i.e. channel
    length, G/D/S conductor size, etc.?
    2) Is the node size the physical size of a chip die or the size of the
    smallest component on the die?

    I would like to understand what an engineer means when he/she says
    130um, 90nm, etc. process.

    tia
    JLD
     
  2. I would suggest that um is micro-metres and nm is nano-metres.

    Track widths and light wavelengths for exposure of the films are measured in
    these units.

    Peter

    --
    Peter & Rita Forbes
    Email Address:

    Web Pages for Engine Preservation:
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  3. JLD

    JLD Guest

    Peter:

    What do you mean by "Track widths and light wavelengths for exposure
    of the films are measured inthese units."?
    I assume that this is the lithography process, but what are tracks and
    exposure? Does that mean the smallest mask that can be made to be put
    over the silicon in order to make a component, device, trace, etc.
    from the lithography process?

    tia
    JLD
     
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