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voice enryption

Discussion in 'Electronic Design' started by jassi, Mar 21, 2007.

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  1. jassi

    jassi Guest

    i am in the final semester of my engg and my team(4 members) is tasked
    to do a project on encrypting voice of normal radio commn.for this we
    r reqd to make a module or attachment which would take audio as input
    and do the processing and give output back to the rodio set .the
    module is reqd to convert Analog to
    compression ...encryption...back to analog for radio to transmit...
    also FEC and Synchronisation is the major issue.we r to use XILINX
    fpga...XC2S100 as this is available in the lab..

    1.can u suggest an approach and feasibility to this?
    2. what devlp board will be reqd for fpga and vhdl info?
    3. can all this be done on fpga itself? i am clueless about what fpga
    is capable of....

  2. My assumption is a "normal" radio comm has a base-band response of 300
    Hz to 3.3 kHz.
    Digital voice, for decent quality, will require some compression. You
    can go one of two ways:
    1) Frequency-domain compression
    2) Time-domain compression

    For frequency domain, research techniques like trigonometric
    transforms (DCT), and also see FFT.
    For Time-domain, see ADPCM.
    I have another suggestion for time domain: Try encoding and decoding
    the audio in NICAM format, such as what is used in Stereo TV
    broadcasts in UK, HK, Sweeden, Spain, France, etc. (Nearly
    Instantaneous Companding Audio Multiplex) It won't fit in a "normal"
    radio channel; however, you can adapt the algorithm to slow down the
    rate. It would still be enough for voice.
    The NICAM algorithm will take care of the frame synchronization and
    some basic error detection.
    Here is a reference:
    If you can't find the ITU spec, I might have a copy.

    Frank Raffaeli
  3. Wim Ton

    Wim Ton Guest

    Have a look at the GSM algorithm.
    What is your bandwidth? If it is SW radio (about 3 kHz), then a DSP sounds
    more suitable than a FPGA for the required agressive voice-compression. I
    suppose a FPGA is ideal for FEC and crypto.

    A common approach is to used 2 layers of FEC:
    You add FEC to a block of data.
    Then you take a few bits from each block and put them in a new block with
    FEC and send them over the radio-link.
    The purpose: if a whole 'upper' block is lost, then it will affect only a
    fews bit per 'lower' block, which can be corrected by the 'lower' FEC.
    Single bit errors are corrected by the 'upper' FEC. The disadvantage is of
    course a long delay between sending and receiving

    For crypto, you use a stream algorithm. AES is said to be feasable in 10-30
    kgates. If you are tight on gates, a self shrinking generator.

    B.t.w. an encrypted link with 2.4 kb/s sounds like a robot with a serious

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