D
Davy
- Jan 1, 1970
- 0
Hi all,
I am reading the book "Writing Testbench". And write the code below:
It seems the code is blocked in the task "@ (posedge clk)", and the
task never return the "valid", why?
I guess task cannot pass the continuous clk value?
//--------test.v-------------
module test;
reg clk;
integer i;
reg [7:0] input1,input2;
reg [7:0] valid1;
test_lib test_lib();
always begin
#50 clk <= 1'b0;
#50 clk <= 1'b1;
end
initial begin
for (i=1;i<=8;i=i+1)
begin
input1 = i;
input2 = i;
begin
test_lib.compare_vector(clk,input1,input2,valid1);
end
@ (posedge clk);
end
end
endmodule
//---------end test.v--------------
//----------test_lib.v-------------
module test_lib;
task automatic compare_vector;
input clk;
input [7:0] input1;
input [7:0] input2;
output valid;
begin
$write("p1\n");
@ (posedge clk)
valid = (input1==input2);
$write("p2\n");
end
endtask
endmodule
//-------end test_lib.v------------
Any suggestions will be appreciated!
Best regards,
Davy
I am reading the book "Writing Testbench". And write the code below:
It seems the code is blocked in the task "@ (posedge clk)", and the
task never return the "valid", why?
I guess task cannot pass the continuous clk value?
//--------test.v-------------
module test;
reg clk;
integer i;
reg [7:0] input1,input2;
reg [7:0] valid1;
test_lib test_lib();
always begin
#50 clk <= 1'b0;
#50 clk <= 1'b1;
end
initial begin
for (i=1;i<=8;i=i+1)
begin
input1 = i;
input2 = i;
begin
test_lib.compare_vector(clk,input1,input2,valid1);
end
@ (posedge clk);
end
end
endmodule
//---------end test.v--------------
//----------test_lib.v-------------
module test_lib;
task automatic compare_vector;
input clk;
input [7:0] input1;
input [7:0] input2;
output valid;
begin
$write("p1\n");
@ (posedge clk)
valid = (input1==input2);
$write("p2\n");
end
endtask
endmodule
//-------end test_lib.v------------
Any suggestions will be appreciated!
Best regards,
Davy