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User I/O via Altera MAX7000S JTAG?

Discussion in 'Electronic Design' started by Andrew Holme, Mar 27, 2005.

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  1. Andrew Holme

    Andrew Holme Guest

    Is there any way to use the JTAG pins of an EPM7128S for user I/O, without
    permanently commiting them as I/O and thereby losing the JTAG capability? I
    want to download data from the PC, via a ByteBlaster cable, into a 2kx8
    static RAM connected to the CPLD. I suppose I could add some jumpers for
    re-patching the 10-way header to standard I/O pins; or have a second,
    dedicated header for the RAM download; but I would prefer to use the JTAG
    pins if possible.

    TIA
     
  2. Ken Smith

    Ken Smith Guest

    I believe that you can make the other pins of the CPLD go high and low via
    the JTAG port. I don't have my Altera data book here. It will be very
    slow.

    You could bring a couple more connections to the JTAG connector by adding
    a couple of pins and making it "non-standard" or comply with the "Holme
    standard" if you prefer. You can then put one program into the CPLD to
    load the static RAM and a different one to use it.

    BTW: I routinely program 7000S parts with a cable that just uses
    resistors and the parallel port of a PC. You don't need to specifically
    use the Byteblaster cable to work with the Altera parts.
     
  3. Andrew Holme

    Andrew Holme Guest

    Thanks Ken. I probably won't need to fill more than 256 bytes of the RAM
    and I don't mind if it takes a couple of seconds.

    Does anyone know where I can find info on how to do this? I have the
    "Altera ByteBlaster" device and the "Altera JTAG Server" service running on
    Windows NT. Are the APIs documented? I also have Quartus II 4.1 Web
    Edition installed.


    Could someone Does anyone know how to do this?
     
  4. Antti Lukats

    Antti Lukats Guest

    sure someone knows!

    there are many ways todo it, the most easy is possible to write a small JAM
    (STAPL) program that will do what you need.
    in case you are able able to use Delphi we also have and application that
    reprograms parallel flash that is connected to several Altera PLDs that
    could be a start point, hmm that code could serve as reference in any case?
    hm I was about to upload this project to
    http://gforge.openchip.org with sources but havent had time yet

    antti
     
  5. Ken Smith

    Ken Smith Guest

    Google on "JAM" and "CPLD" you are likely to find stuff about the JAM
    STAPL downloading method. Alter supports this and, at least, had
    documentation about it. You can get the C source code.

    On an NT system, doing direct printer port I/Os requires special drivers.
    Even then the timing is a bit wobbly. If you have an old DOS machine, you
    may be better off than with the NT machine. You can also do it under
    Linux.

    I think the 7000 series data sheet has a little about its ISP lines.
    Basically, you shift in commands serially and it reacts to the command
    words. For each thing you do, you shift in a clump of bits. While you
    shift in, it also shifts results out. This is what the RDI and TDO lines
    are all about.

    You have to be careful to give the part clean signals.
     
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