Understanding N channel and P Channel FETs

[Ratch]

Yes, if you consider the Vgs(th) as a parameter that can be altered by the designer of the mosfet, roughly speaking an enhancement mode mosfet has a Vgs(th) greater than zero and a depletion mode device has one less than or equal to zero. This represents a continuum where we place enhancement vs depletion devices either side of zero and logic level devices arbitrarily close to zero.

It is theoretically possible to make an enhancement mode jfet, but it would be about as useful as equally possible (enhancement or depletion mode) mosfets where the Vgs(th) was greater than Vgs(max).

If you made a enhancement JFET, it would not be a JFET any more would it?

Ratch

 

[Ratch]

What I am saying is that I cannot understand the why an N-channel MOSFET is called enhancement mode and an N-channel JFET is called depletion mode when, in both cases, raising Vgs increases the current in the channel. In both cases there is a threshold voltage, and when Vgs is below Vgsth, current is cut off. The only difference being that Vgsth is negative for the JFET and positive for the MOSFET.

Bob

The JFET reduces current by pinch-off. A depletion-mode FET reduces current by channel degradation. They are two different phenomena.

Ratch