K
Keith R. Williams
- Jan 1, 1970
- 0
I would be happy to do that for ya !^)
http://www.fairchildsemi.com/ds/TI/TIP31.pdf
Check under "Electrical Characteristics" near the bottom.
Strange! First of all, look at the footnote for these three specs.
Hfe, Vce(sat), and Vbe(sat) are specified with a 300uS pulse at 2% duty
cycle. Exceed these limits and all bets are off (including package
integrity ;-).
Now the Vce(sat) spec calls for 3A Ic with Ib=.375A and is 1.2V. I
*assume* this goes with the Vbe(sat) of 1.8V at IC=3A (consistent so
far). So you have 1.8V Vbe and 1.2V Vce, so the base-collector
junction is forward biased by .6V. Ok, that's saturation. Don't do
this for more than 300uS though. The magic smoke is near!
What I don't understand is the Vbe(sat) condition of Vce=4V (it was
1.2V with this collector current in the line above). The transistor is
*not* in saturation with Vce=4V and Vbe=1.8V (Base-collector junction
is reverse biased by 2.2V).
Other comments?