# Time controlled switch in Pspice

Discussion in 'General Electronics Discussion' started by ryz, Dec 13, 2012.

1. ### ryz

6
0
Aug 16, 2012
Hi dear forumers.

I want to simulate a system and I found myself in need for a time controlled switch, but unlike the default switches it should not just open once, but toggle when I want it to. After some web search I found that what I will be needing is the Vswitch model which does preety much what I need. If I hook it up with a pwl voltage source I can make the desired switch. In this setup you can feed the pwl source with some time and voltage values like follows:
t1= 1m V1= 0
t2= 1.001m V2= 5
t3= 2m V3= 5
t4= 2.001m V4= 0

This results in a nice squarewave signal from 0 to 5 V. This can control the Vswitch model just fine, but in my opinion it contains too many (useless) parameters. If I want to use the same transition time on every change than it can save me a bunch of parameters. Basically I wanted to make it a bit more user friendly by defining a parameter for the transition time (ttr). With this I wanted to do the following

ttr= 1u
t1= 1m V1= 0
t2= t1+ttr V2= 5
t3= 2m V1= 5
t4= t3+ttr V2= 0

I was then shocked to discover that it is not possible to define expressions for the time. Or at least this is what the error said.

My question is: am I doing something wrong or if not, do you know a workaround to avoid this problem but keep this structure with the transition time? The subcircuit for the time controlled switch is the following:
It is supposed to be closed at t=0 and change states at every defined time (for example open at t1 than close at t2 and so on..)
.SUBCKT Sw_t_cont_open 1 2 PARAMS:
+ t1=0 ; time at which switch first opens
+ t2=0 ; time at which switch first closes
+ t3=0 ; time at which switch opens
+ t4=0 ; time at which switch closes
+ t5=0 ; time at which switch opens
+ ttran=1u ; time required to switch states (must be realistic, not 0)
+ Rclosed=0.01 ; Closed state resistance
+ Ropen=1Meg ; Open state resistance (Ropen/Rclosed < 1E10)
V_V1 3 0 PWL ({t1} 1 {t1+ttran} 0 {t2} 0 {t2+ttran} 1 {t3} 1 {t3+ttran} 0 {t4} 0 {t4+ttran} 1)
S1 1 2 3 0 Smod
.model Smod Vswitch(Ron={Rclosed} Roff={Ropen} Von=1V Voff=0V)
.ends
* end of time controlled switch model  