Three input functions on one PIC port pin?

[John Larkin]

Because it will either be high or damaged.

Have you ever seen a CMOS logic chip damaged by a short to Vcc or to
ground? I haven't.

John

 

[Fred Bloggs]

Don needs a workaround in an unusual situation, and this would be
perfectly safe.

It's not an "unusual situation" to anything above the intellectual
development of brain-damaged dog- a single pin can be used to read any
number states.

 

[Jim Thompson]

Have you ever seen a CMOS logic chip damaged by a short to Vcc or to
ground? I haven't.

John

Nope. Unless it was a line driver, but most of those are
current-limited.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| Jim-T@analog_innovations.com Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

For proper E-mail replies SWAP "-" and "_"

Why is it that Democrats can't debate politely?
And are only rude and interruptive.
Lack of mental capacity?

 

[Spehro Pefhany]

Have you ever seen a CMOS logic chip damaged by a short to Vcc or to
ground? I haven't.

Neither have I. Under "typical" conditions (room temperature).

I'm a bit unsure about the long-term reliability issues of having
uncontrolled, but >50mA pulses (the metal migration failure mode),
especially at the high operating temperatures often present in a motor
control (close proximity to power devices), and it would give the
power supply bypass caps a much better workout than they'd normally
get. I also like to see some series resistance on anything going from
a pin to something a finger gets near, so that would necessitate the
other two parts (well, two parts total if you use a network) and the
parts cost would be pretty negligible (a penny or two).

This is really a judg[e]ment call- I really do suspect John's idea
would work just fine, but would it be worth testing? (burn-in at high
Ta?) Does it *need* to be tested?

The last PIC-based induction motor controller I designed used forced
convection cooling so it wasn't too bad temperature wise, but between
the three half-bridges, the bridge rectifier, and other stuff there
was a lot of heat generated.

Best regards,
Spehro Pefhany

 

[Spehro Pefhany]

I'm not a uP expert, but do I recall correctly that "strength" can be
set on outputs (at least certain devices)?

I've not seen it that I can remember, it's design and process
(including die shrink) dependent, and seems to get a bit higher
(usually this is better) with each revision, as the maximum supply
voltage drops.

There are (were?) some Toshiba devices that could do all kinds of
things on their output ports (programmable)- drive LEDs (low voltage
high current), VFDs (high voltage low current) and maybe LCDs (low
voltage low current). Maybe that's what you're thinking of. It must
have been an interesting challenge from a chip design pov.

The old Intel devices (still very available and popular in the form of
some 8xC51 devices) have a hideous pseudo-bidirectional design that
incorporates a weak pullup and a strong pullup that is switched in for
a brief period of time (some portion of a machine cycle, IIRC) to
charge exernal capacitance.

But the PICs use conventional bidirectional CMOS I/Os, some with a
rather weak pullup that can be turned on or off from a config
register.

Best regards,
Spehro Pefhany

 

[John Larkin]

I'm not a uP expert, but do I recall correctly that "strength" can be
set on outputs (at least certain devices)?

[snip]
The old Intel devices (still very available and popular in the form of
some 8xC51 devices) have a hideous pseudo-bidirectional design that
incorporates a weak pullup and a strong pullup that is switched in for
a brief period of time (some portion of a machine cycle, IIRC) to
charge exernal capacitance.

But the PICs use conventional bidirectional CMOS I/Os, some with a
rather weak pullup that can be turned on or off from a config
register.

Best regards,
Spehro Pefhany

That must be what I was remembering... selectable weak or strong
pull-ups.

...Jim Thompson

The newer Xilinx chips allow you to program all sorts of output
options: fast edges, slow edges, tristates, passive pullups and
pulldowns, bus keepers, and about a dozen different s.e. and
differential logic levels. The parts are getting so fast that the slow
edge thingie can avoid a lot of trouble.

John

 

[Dana Raymond, a minor God]

If the CMOS device has current limited output port drive, then I agree it
should be safe. The datasheet should specifically mention this though.

Dana Raymond

 

[Dana Raymond, a minor God]

I have, many times. Even if it survives the pin should be considered
'stressed' and may no longer function correctly across
life/voltage/temperature and its IBIS curves may have changed..

This kind of damage can be observed with micrographs of the port structure.

However, there are parts with current limited outputs that are spec'd for
continuous output shorts, and they should be fine.

Dana Raymond

 

[Spehro Pefhany]

Adding a single resistor in series and relying on pin capacitance instead of
short circuit current seems to me to be a safer approach, especially when
used on high volume or high service-cost products. Why? Because you are
relying on an uncharacterized and untested electrical parameter that may
change suddenly by the manufacturer.

John's idea will be much less sensitive to outside noise that happens
to come along in the brief window when the pin is being read. ;-)


JL
VCC
+
|
|
|
o--+
o--o----
o--+
|
|
|
|
|
===
GND




DR
VCC
+
|
|
|
___ o--+
o---|___|----o----
R o--+
|
|
|
|
|
===
GND




SP
VCC
+
|
|
270R 270R |
___ ___ o--+
o---|___|---+---|___|--o----
| o--+
| |
--- |
--- 1n |
| |
| |
=== ===
GND GND



Best regards,
Spehro Pefhany

 

[John Larkin]

John's idea will be much less sensitive to outside noise that happens
to come along in the brief window when the pin is being read. ;-)


JL
VCC
+
|
|
|
o--+
o--o----
o--+
|
|
|
|
|
===
GND




DR
VCC
+
|
|
|
___ o--+
o---|___|----o----
R o--+
|
|
|
|
|
===
GND




SP
VCC
+
|
|
270R 270R |
___ ___ o--+
o---|___|---+---|___|--o----
| o--+
| |
--- |
--- 1n |
| |
| |
=== ===
GND GND



Best regards,
Spehro Pefhany

Right. Plus, I win on minimum parts count.

John

 

[Dana Raymond, a minor God]

Thats why you place the resistor as close to the pin as possible and route
other signals away from the pin.

Anyway, as John says, he wins on minimum parts count! LOL!

Dana Raymond ;~)

John's idea will be much less sensitive to outside noise that happens
to come along in the brief window when the pin is being read. ;-)


JL
VCC
+
|
|
|
o--+
o--o----
o--+
|
|
|
|
|
===
GND




DR
VCC
+
|
|
|
___ o--+
o---|___|----o----
R o--+
|
|
|
|
|
===
GND




SP
VCC
+
|
|
270R 270R |
___ ___ o--+
o---|___|---+---|___|--o----
| o--+
| |
--- |
--- 1n |
| |
| |
=== ===
GND GND



Best regards,
Spehro Pefhany

http://www.speff.com