Three input functions on one PIC port pin?

[Don Lancaster]

Remember seeing this somewhere.
Need a link or description.

Three position switch. Position A makes input pin positive, B floats it
tri state and C grounds it.
As in an up-hold-down speed control. PIC able to quickly tell the
difference of all three states.

Analog or A/D techniques undesriable in this app.
Must happen in very few clock cycles.


--
Many thanks,

Don Lancaster
Synergetics 3860 West First Street Box 809 Thatcher, AZ 85552
voice: (928)428-4073 email: [email protected] fax 847-574-1462

Please visit my GURU's LAIR web site at http://www.tinaja.com

 

[Richard Henry]

Remember seeing this somewhere.
Need a link or description.

Three position switch. Position A makes input pin positive, B floats it
tri state and C grounds it.
As in an up-hold-down speed control. PIC able to quickly tell the
difference of all three states.

Analog or A/D techniques undesriable in this app.
Must happen in very few clock cycles.

I don't know if thai is what you are looking for, but I have heard this
trick (works | (is a (bug | feature) of PICs).

To detect a tri-stated PIC input, output a 0, then quickly read the
input. Then output a 1 and quicky read the input.

If you get 0-0, it's low, 1-1 high, 0-1, tri-state.

1-0?

 

[Wouter van Ooijen]

Three position switch. Position A makes input pin positive, B floats it

tri state and C grounds it.
As in an up-hold-down speed control. PIC able to quickly tell the
difference of all three states.

Analog or A/D techniques undesriable in this app.
Must happen in very few clock cycles.

Without involving other pins I don't see how you could do this except
by timing. Put a small cap on the pin, and a resistor to the (common
of the) switch. Write a 1, switch to input, and read back after a
small delay. Will be 1 with the switch in middle or to +, 0 with
switch to 0. Write a 0, ....


Wouter van Ooijen

-- ------------------------------------
http://www.voti.nl
PICmicro chips, programmers, consulting

 

[John Larkin]

Remember seeing this somewhere.
Need a link or description.

Three position switch. Position A makes input pin positive, B floats it
tri state and C grounds it.
As in an up-hold-down speed control. PIC able to quickly tell the
difference of all three states.

Analog or A/D techniques undesriable in this app.
Must happen in very few clock cycles.

Sounds like 10 instructions or thereabouts. Is that too many?

John

 

[Andrew Paule]

My guess is that you are going to have one lot of parts that this works
on one way, and another lot that does the opposite - two comparators and
a couple gates makes more sense for anything other than a single board
for fooling around with.

Andrew

 

[Spehro Pefhany]

Remember seeing this somewhere.
Need a link or description.

Three position switch. Position A makes input pin positive, B floats it
tri state and C grounds it.
As in an up-hold-down speed control. PIC able to quickly tell the
difference of all three states.

Analog or A/D techniques undesriable in this app.
Must happen in very few clock cycles.

Small capacitor (say 1n) with 270R to the port pin, 270R resistor from
cap to the switch common. R-C time constant is 270 nsec if the switch
is close, much longer if it's open.

A. Write a 1, twiddle thumbs for 1 or 2 usec, tri-state, twiddle
thumbs for 1 or 2 usec, read

B. Write a 0, twiddle thumbs for 1 or 2 usec tri-state, twiddle thumbs
for 1 or 2 usec, read

A B switch position
Case: 0 0 low
1 0 open (middle position on SPDT center off sw)
0 1 shouldn't happen
1 1 high


If port leakage is 1uA, the voltage change in 1-2usec is only 1-2mV
with a 1nF cap.

Best regards,
Spehro Pefhany

 

[Fred Bloggs]

Remember seeing this somewhere.
Need a link or description.

Three position switch. Position A makes input pin positive, B floats it
tri state and C grounds it.
As in an up-hold-down speed control. PIC able to quickly tell the
difference of all three states.

Analog or A/D techniques undesriable in this app.
Must happen in very few clock cycles.

Please view in a fixed-width font such as Courier.





Vdd
|
/
Rpu
/ READ SW0<- PORT
\ +------------+
| | tinyL | WRITE 0-> PORT
_ o Rd | +------+ |
/| +--/\/\--+--|d | | WRITE 1-> PORT
Port>---o/ o---+ | | |
+-----------|> | | READ SW1<-PORT
SW o | _ | |
| | q |--+ SW1<>SW0 THEN TRISTATE
/ +------+
Rpd SW0=0 THEN DOWN
/
\ SW0=1 THEN UP
|
0V R's=10K?

 

[Fred Bloggs]

This can work if you can NOOP or whatever to read on the right PIC clock
edges- SW0 in on CLKm and SW1 on CLKn then (n-m)MOD 2 =1 will do it-
also means successive clocks.

Please view in a fixed-width font such as Courier.


REAL FAST VERSION IF Tsu and Th ETC ARE KNOWN


Vdd
|
/
Rpu
/ READ SW0<- PORT
\
| +------------+ READ SW1<-PORT
_ o | |
/| Rd | +------+ |
Port>---o/ o------/\/\--+--|d | | SW1<>SW0 THEN TRISTATE
| | |
SW o +--|> | | SW0=0 THEN DOWN
| | | _ | |
/ | | q |--+ SW0=1 THEN UP
Rpd | +------+
/ |
\ |
| |
0V |
|
|
PIC |
CLK >-------------------+

I see my switch positions are crossed- so this should do it:

Please view in a fixed-width font such as Courier.


Vdd
|
/
Rpu
/ READ SW0<- PORT
\ +------------+
| | | WRITE 0-> PORT
_ o Rd | +------+ |
/| +--/\/\--+--|d | | WRITE 1-> PORT
Port>-+-o/ o | | | |
| +-----------|> | | READ SW1<-PORT
| SW o | | _ | |
| | | | q |--+ SW1<>SW0 THEN TRISTATE
+------|---+ +------+
| SW0=0 THEN DOWN
|
/ SW0=1 THEN UP
Rpd
/
\ Rd= 6 x Rpu and Rpu=Rpd for TTL comptble
|
0V

 

[Don Lancaster]

I don't know if thai is what you are looking for, but I have heard this
trick (works | (is a (bug | feature) of PICs).

To detect a tri-stated PIC input, output a 0, then quickly read the
input. Then output a 1 and quicky read the input.

If you get 0-0, it's low, 1-1 high, 0-1, tri-state.

1-0?

The old Apple IIe vaporlock trick.
Probably could enhance it by adding a small capacitor to the port pin.

A/D might be better after all.

--
Many thanks,

Don Lancaster
Synergetics 3860 West First Street Box 809 Thatcher, AZ 85552
voice: (928)428-4073 email: [email protected] fax 847-574-1462

Please visit my GURU's LAIR web site at http://www.tinaja.com

 

[CFoley1064]

Three position switch. Position A makes input pin positive, B floats it

tri state and C grounds it.
As in an up-hold-down speed control. PIC able to quickly tell the
difference of all three states.

Analog or A/D techniques undesriable in this app.
Must happen in very few clock cycles.


--
Many thanks,

Don Lancaster
Synergetics 3860 West First Street Box 809 Thatcher, AZ 85552
voice: (928)428-4073 email: [email protected] fax 847-574-1462

Please visit my GURU's LAIR web site at http://www.tinaja.com

I remember seeing this somewhere -- hope it helps. View in fixed-width font.

ON-OFF-ON
SWITCH VCC
|| |
|| |
6.8K 1K ||---|
___ ___ ||
PIC Pin-|___|--------|___|----|
| ||
--- |/---|
--- || |
| || |
GND |
GND

created by Andy´s ASCII-Circuit v1.22.310103 Beta www.tech-chat.de


The thingy in the middle is supposed to be a SPST ON-OFF-ON 3-position switch.
All you need to do is read the input, make the pin an output, output the
opposite logic value for one instruction, then make the pin an input again and
read. Results will tell if tri-state with 2 resistors and one small cap

By the way, thanks for everything, Don.

 

[John Larkin]

This techniques works well with a tri-stateable input/output pin.
It relies on input pin capacitance (don't use internal pullups) but check
the instruction timing and compare to leakage pin currents, etc.

Why rely on capacitance? Just

Enable pin as output

Pull it up and note level

Pull it down and note level

Disable as output

Do a little logic.

John

 

[Dana Raymond, a minor God]

Huh? Lets say the switch is connected to gnd, ok?
You enable the output and drive it high. The only way to detect that the
switch is GND is to read the pin and read a 0. During the time the output
has '1' on it you are effectivly shorting the driver, exceeding its SOA.
This will stress the driver, either severely limiting its life or causing
outright failure. Thats not good design practive.

In fact, you can 'overdrive' outputs pins for very short periods of time, as
failures are thermal in nature. Circuit board testers used to use this
technique by 'injecting' a digital signal into a net as test stimulus. We
now use jtag and other test methods.

However, when considering tens of thousands of manufactured units, its never
a good idea to exceed the maximum rated spacs for a part, unless you know
better than the part manufacturer!

Dana Raymond

 

[John Larkin]

Huh? Lets say the switch is connected to gnd, ok?
You enable the output and drive it high. The only way to detect that the
switch is GND is to read the pin and read a 0. During the time the output
has '1' on it you are effectivly shorting the driver, exceeding its SOA.
This will stress the driver, either severely limiting its life or causing
outright failure. Thats not good design practive.

In fact, you can 'overdrive' outputs pins for very short periods of time, as
failures are thermal in nature. Circuit board testers used to use this
technique by 'injecting' a digital signal into a net as test stimulus. We
now use jtag and other test methods.

However, when considering tens of thousands of manufactured units, its never
a good idea to exceed the maximum rated spacs for a part, unless you know
better than the part manufacturer!

Dana Raymond

No CMOS output is going to be bothered by driving against the opposite
rail for a few microseconds. The thermal time constants here are in
the 10s of milliseconds.

John

 

[Wouter van Ooijen]

Why rely on capacitance? Just

Enable pin as output
Pull it up and note level

Because it will either be high or damaged.



Wouter van Ooijen

-- ------------------------------------
http://www.voti.nl
PICmicro chips, programmers, consulting

 

[Ban]

Because it will either be high or damaged.

Well "damaged" will be the forth state your pic IO could be in. Just do as
advised and put all IOs into the forth state, then at least that state is
stable forever. :-(

ciao Ban

 

[Spehro Pefhany]

Well "damaged" will be the forth state your pic IO could be in. Just do as
advised and put all IOs into the forth state, then at least that state is
stable forever. :-(

I've got an 8749H with a damaged port pin- it only changes a few
hundred mV from 0 to 1.

Best regards,
Spehro Pefhany

 

[Dana Raymond, a minor God]

Sorry John, I have to disagree. Power is distributed to the device's IO ring
through one or more metalization layers, which do not have the cross
sectional area of the bonding wires on the power pins. Excessive current
flow can, in fact, result in lower voltage on other section's of the die.
This can result in internal signalling failure, logic failure, timing
failures, FF state loss, and PLL jitter/lock loss. All of these can result
in intermittent operation of the device.

Don't do this. Don't advice others to do it. Period.

Dana Raymond

 

[Costas Vlachos]

I haven't tested it, but I think John's method above will work fine. The
chip won't get damaged if an output is pulled away from its voltage for a
few instruction cycles (normally a few millisecs) and the time between
pollings is long. I think I've read in a Microchip app note that you can use
this method to test for faults/shorts in your hardware. For example, if an
output pin is somehow shorted to GND, you can send a logic high to it and
then read it. If it reads low, you just make it an input to protect the chip
and display an error message.

Costas

Sorry, that should be "a few microsecs".

Costas

 

[Tony Williams]

I've got an 8749H with a damaged port pin- it only changes a few
hundred mV from 0 to 1.

.......... and I bet you haven't thrown it away just
in case the right job comes up for it one day.

 

[John Larkin]

Sorry John, I have to disagree. Power is distributed to the device's IO ring
through one or more metalization layers, which do not have the cross
sectional area of the bonding wires on the power pins. Excessive current
flow can, in fact, result in lower voltage on other section's of the die.
This can result in internal signalling failure, logic failure, timing
failures, FF state loss, and PLL jitter/lock loss. All of these can result
in intermittent operation of the device.

Don't do this. Don't advice others to do it. Period.

Dana Raymond

But I *do* 'advice' others to do this. We short pins all the time to
force logic levels during test, and have never observed any of the
disasters you suggest. I have also never seen a tristate conflict -
most involving *many* pins on a bus - damage anything except this
cycle's data. Nearly all CMOS parts are designed to survive a
sustained short, much less a short of microseconds duration.

Don needs a workaround in an unusual situation, and this would be
perfectly safe.

John