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This is a correct simulation result?

Discussion in 'Electronic Design' started by Boki, Apr 28, 2006.

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  1. Boki

    Boki Guest

  2. Guest

    http://www.fairchildsemi.com/ds/2N/2N7002.pdf

    In so far as the results don't look too different from Figure 1 on page
    4 of the data sheet, the simulations aren't obviously misleading.

    They aren't realistic - a more comprehesive simulation would show the
    gate-source junction breaking down when the gate-source voltage
    exceeded 40V and the channel would vapourise fairly quickly with 20A
    running through it - but computer modelling is all about using
    over-simplified models to see roughly what is going on.
     
  3. Boki wrote...
    No, it's a good example of GIGO. Your model is WRONG. Don't
    blame spice when you use defective worse-than-useless models.
     
  4. wrote...
    I wouldn't say that. Most real parts are even more wimpy than shown
    in figure 1, but basically the maximum current vs drain voltage is
    shrinking as it goes above 2A, as shown by the curve bending to the
    right. Even at high voltages the FET won't be able to conduct more
    than 4 - 5 amps. Compare that to the defective spice model, which
    shows the current gaily increasing to 22A and beyond, as if a simple
    Rds = 2.27 ohms was all that mattered. But as the datasheet shows in
    figure 2, Rds increases dramatically at high currents. They don't
    plot the curves very far, if they did the model's serious discrepancy
    would show more dramatically. That's one of the model's defects at
    high current. At low gate voltages the model isn't even in the same
    ballpark. It completely fails to model the threshold scene. All
    the detail we show for MOSFET behavior in AoE pages 121-123 is
    missed by the model. Anyway, as a result Boki gets GIGO.

    I repeatedly say, vet your spice models with bench measurements.
     
  5. Hello Boki,

    To be honest, the simulation setup is nonsense!
    The MOSFET will not withstand a Vgs of 50V.

    Try the following.
    ..dc V2 0 10 0.01 V1 0 3 0.6
    Garbage in -> garbage out.


    Please read the datasheet before you setup a simulation.

    Best regards,
    Helmut
     
  6. Boki

    Boki Guest

    But that is the model provided by that company, what can we do more...

    Best regards,
    Boki.
     
  7. Pooh Bear

    Pooh Bear Guest

    The answer is simple. Don't rely on simulations. There's no substitute for
    *understanding* how circuitry works. Learn some design theory !

    Graham
     
  8. Fred Bartoli

    Fred Bartoli Guest

    No. Don't blindly rely on crappy models.
    This case is trivial, but when doing serious analog design you have to check
    your models, know their limitations... and it's often that we have to make
    our own ones, carefully check them... This can be a non negligible part of
    the design time.

    Can't agree more.
     
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