Because you gave such a clear functional description, I have designed a circuit that I think will do what you want
This circuit operates from a 12V power source, and drives a 12V DC motor. It can supply up to 1A to the motor; if the motor draws more than that, you will need to use a larger diode for DR. You may also need a larger MOSFET in the Q2 position as well.
The circuit is based on two CMOS ICs. U1 is a CD40106B hex inverting Schmitt trigger IC, which contains six identical inverting gates, which are shown in the schematic as triangles with small circles. The U1A gate is not used; its input is tied high. The circle end is the output, and the gate drives this signal to the logical opposite of the input. The "Schmitt trigger" characteristic of the inputs improves the circuit's immunity to noise and problems caused by slowly changing voltages. Look up Schmitt trigger on Wikipedia for more information.
U2 is a CD4013B dual "D-type" flip-flop. This contains two identical latch or flip-flop circuits. The one on pins 1~6 of the IC (the left side, on the schematic) controls the motor; the other one controls the LED. These words are shown on the schematic for clarity.
A latch is a circuit that remains in its current state until a change is triggered through its inputs: clock, data, set and reset. A high level on Set or Reset immediately sets or resets the latch (forces its output to 1 or 0, respectively), and on a "D-type" latch, a rising edge (low to high transition) on the clock input clocks the current state of the D input (data) into the latch. Each latch's output is made available on two pins - the Q output is the true state of the latch, and the Q-bar output (Q with an over-bar indication) is the opposite of that state.
Starting at the left side of the diagram, SW1 ("Switch A" in your description) is fed through a debouncing circuit consisting of an R-C delay and a Schmitt trigger. The output of the Schmitt inverter gate, on U1 pin 12, is normally low (0V) but goes high (+12V) while the pushbutton is pressed. This transition affects the Motor latch.
The Motor latch, pins 1~6 of U2, controls the motor. The connection from the Q-bar output back to the D input means that on every rising edge (low-to-high transition) on the clock input, the latch will toggle its state. This means that every time SW1 is pressed, the left hand latch in U2 toggles, and the motor changes from OFF to ON or vice versa.
The Motor latch also has a Reset input, which is driven by other circuitry explained below.
Starting now with SW2 and working leftwards. This switch is debounced in the same way as before, and is inverted twice: U1 pin 6 is normally high and goes low while SW2 is pressed. This output goes into the Reset input of the latch on pins 8~13 of U2, the LED latch, which drives the LED, so, while SW2 is open, the LED is forced OFF.
The output of this latch also feeds the Reset input of the Motor latch. This means that while the LED is ON, the latch that controls the motor is held in the Reset state; it is impossible to turn the motor ON with SW1 while the LED is ON.
Q1 is a P-channel MOSFET. It is actually used as a simple logic gate. The way it's connected, its output (its drain pin, marked D) will only go high if its source pin is high (this occurs when the motor is enabled) AND its gate pin is low (this occurs when SW2 is pressed). When these conditions occur at the same time, after a short delay due to RD3 and CD3, U1 pin 8 goes high, and at that instant, the LED latch is set, because its D input is tied high.
This causes the LED to light immediately, and it forces the Motor latch OFF and holds it OFF. The LED latch will reset when SW2 is released, because its reset input is driven from U1 pin 6. The short delay provided by RD3 and CD3 avoids possible race conditions (Wikipedia it if you like) involving both latches.
The right hand part of the diagram shows remaining parts of the circuit. The LED is driven directly from the LED latch with a 3k3 limiting resistor, which provides only 3 mA. If more LED current is needed, a buffer (such as an NPN transistor connected as an emitter follower) should be used. Logic ICs like the CD4013 are not intended to drive more than a few milliamps.
Q1 is a P-channel enhancement mode MOSFET used at low current. The first suggested part is a through-hole (wire leaded) package: TO-92. The other two are SMT (surface-mount technology, i.e. no flexible leads; only for direct mounting flat onto circuit boards).
Q2 is an N-channel power MOSFET that controls the motor. When the gate pin is at 0V, there is no voltage between the gate and the source of Q2, and it is in the OFF state. No current flows through the drain-source path; no voltage appears across the motor, and no current flows through it.
When the gate pin is brought up to +10V or more, Q2 conducts heavily, and pulls its drain down hard to the negative rail. This causes the supply voltage, 12V, to appear across the motor.
For Q2 component choices, a low ON-resistance specification (called Rds(on)) minimises power lost in the MOSFET, and therefore, heating. Its voltage rating must suit the load supply; at least 20V in this case. The NTD4906N is available in through-hole and SMT. There are alternatives in the through-hole TO-220 package which may be easier to work with. The Infineon IPP065N03L (
http://www.digikey.com/product-searc...rds=IPP065N03L) seems way overkill, but (a) it only costs USD 1.05, (b) it will be pretty much indestructible, and (c) you could get a few more for further experiments where its superior specifications might be needed.
DR is required because the motor is an inductive load; when Q2 turns off and the current flow ceases, the inductive characteristic of M1 causes an "inductive kick-back" voltage spike with the opposite polarity, and this tries to raise Q2's drain above the +12V rail. If this spike is large enough, Q2 could be damaged, so DR is added to the circuit to absorb the spike and protect Q2.
The capacitors marked CDU1 and CDU2 are decoupling capacitor for U1 and U2 respectively, and must be connected as directly as possible between pins 7 and 14 (the power supply pins) of the relevant IC to ensure that their logical and latching functions are not disturbed by noise on the power supply rails.
The capacitors are all ceramic or multi-layer ceramic types, with X7R dielectric. The Z dielectrics are cheaper but do not perform well enough for this application, except as decoupling capacitors for U1 and U2. All capacitor values are given in nanofarads. It's common to use 50V rated capacitors.
Significant power supply noise may come from the motor switching circuit and I have shown RS, a ten ohm resistor, which will provide some isolation. It could be replaced by a regulator that drops the logic component supply voltage down as low as about 9V but no lower; Q2 needs plenty of gate voltage to saturate properly.
Both of the MOSFETs, and U1 and U2 as well, are static-sensitive and should be handled using ESD (electrostatic discharge) precautions. This means keeping yourself and your circuit grounded while you're working on it, and when you're handling those components. The ICs probably come in a tube, or conductive foam. Only remove them at the last moment. Preferably use IC sockets for U1 and U2. For the MOSFETs, keep their leads in conductive foam or connected with a paper clip until AFTER they're soldered into the board.
