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Synchronized SPI communication

Discussion in 'Electronic Design' started by Vivek B, Sep 24, 2007.

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  1. Vivek B

    Vivek B Guest

    I am trying to implement interrupt based SPI communication between two
    Atmel microcontrollers. The data has to be transmitted from slave to

    In master i continuously sends 0xff to the slave and master expects
    data from slave on each transfer.

    char SPI_MasterTransfer(char cData)
    uint8_t a;
    PORTB &= ~(_BV(PB4)); // Slave select
    a = SPDR;
    SPDR = cData;
    while(!(SPSR & (1<<SPIF)));
    PORTB |= (_BV(PB4));
    return a;

    I have a an array buf[3] = {10,20,30} in the slave. Whenever the
    transaction is over the slave gets into the interrupt service routine
    and checks if the data received is 0xff, if so then transmits buf
    (where i varies as 0,1,2,0,1,2....)


    uint8_t data;

    data = SPDR;

    if(data == 0xff){
    SPDR = buf;
    flag = 2;
    i= (i+1)%3;

    Now the problem is i get correct data as well as junk data at the
    master side.

    What i deciphered the problem is:

    After the reception of 0xff from master the slave get into the ISR()
    and at this time the master may again send another 0xff for which the
    master gets back 0xff (ie., the last data received in the slave SPDR)
    itself from slave.

    I solved the problem by putting delays between each transfer in master

    But the solution looks a bit (lot) awkward. Can i achieve
    synchronization in any other method?? (any kind of talk back
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