A
Alex
- Jan 1, 1970
- 0
Hello,
in terms of an practical exercise it is required to do a electric
circuitry consisting of an parallel-circuitry between one J-FET and one
non voltage dependent resistor. The first component (J-FET) ist
operatet (biassed) up to maximum pinch-off current (current drain = 0).
The resulting point of this pinch-off-state should be wired as the
drain-connection. This is not an big task, so your help would be very
appreciated as far as circuitry-design is concerned. An solution with
simulation software such as PSpice would be good for me as well.
Please give me a hint.
A. Kratzer
in terms of an practical exercise it is required to do a electric
circuitry consisting of an parallel-circuitry between one J-FET and one
non voltage dependent resistor. The first component (J-FET) ist
operatet (biassed) up to maximum pinch-off current (current drain = 0).
The resulting point of this pinch-off-state should be wired as the
drain-connection. This is not an big task, so your help would be very
appreciated as far as circuitry-design is concerned. An solution with
simulation software such as PSpice would be good for me as well.
Please give me a hint.
A. Kratzer