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SR Latch initialization on bread board.

Discussion in 'Electronic Design' started by [email protected], Aug 14, 2013.

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  1. Guest

    I have been all over the place and cannot seem to find an actual explanation for one or many possible solutions on the race state of a SR Latch on initialization/power up

    I have a small circuit on a bread board using an SR Latch, the circuit functions correctly once power is on and the SR latch has been manually used toset the desired initial state.

    But, the race condition when the circuit is powered is very indeterminate and it bounces back and forth to which state wins. But I cannot seem to findan explanation as to how to set the initial state properly and then have it function as normal.

    I have tried a few methods on my own but none seem reliable enough. Am I missing something as it seems like it should be quite simple, but I have not seen a solution I can apply on my board. Either I'm blind and its right in front of my face or somehow I have been unable to Google it. Found a LOT ofsites explaining the race condition, but no solutions on how to "set" it.

    -E
     
  2. Guest

    The problem is I don't know of any POR circuit examples handling a SR Latch. What I am trying to solve is the fact that on power up the state of the latch is indeterminate. I know what I want it to be but don't know how to ensure it starts in that state.

    Or how would one make the input come up slower than the other? Bridge a capacitor on one side?
    I am doing this on a solder less bread board, but will be moving it to a protoboard once everything is figured out.

    I have been doomed to the indeterminate problem but I don't have the knowledge or exp to know what solution is effective or "correct"
     
  3. Guest

    Im using
    http://www.digikey.ca/product-search/en?x=-1421&y=-72&lang=en&site=ca&KeyWords=HCF4001B
    For a chip and using two of the NOR gates to build a Latch
    http://upload.wikimedia.org/wikipedia/commons/a/a8/SR-NOR-latch.png

    I have 13.5v powering the chip.
    But I still don't follow how I can get this latch to power up in a specific state. Every time I restart it is seemingly random which side of the latch starts active.

    Im not a EE, just a software guy trying that has really wanted to learn how to build electronics and is getting stuck.
     
  4. Guest

    Thanks, I have learnt a lot already trying to figure this out. This is my first dip into IC's and circuit based logic. And really feel I have made progress, esp in understanding how little I know :)

    I think my inexperience is culprit in not understanding the solutions presented. And I appreciate the help.

    Now the power on state of the latch will have either R = 0 & S = 0
    Or R=1 & S = 0, The problem is when when R = S = 0 and then the latch jumps into its race condition.

    Not sure how a power on reset would work here, but I can understand puttinga delay in between Q and S would yield the result I am looking for. And I would hope that it will initialize the latch with 'Q as high R=S=0.

    Now, would a recommended method of doing this would be to put a capacitor on the Q,S link and ground. Would this slow down the race condition enough to allow the latch to initialize in the state I wish? Or is there another expected method used to cause this slow down?

    For the explicit reset circuit, if one loses power. Regains power and once you are above the threshold and have proper power. How would the reset circuit integrate with the inputs on the latches, would it just trigger transistors on the RS inputs? Or would it have them in the way of the QS and 'QR pathways?
    Because if its simply Preventing the input on the RS side, won't I have thesame race condition of the RS latch being R=S=0 and then one side "winning" the race condition.

    - E
     
  5. Guest

     
  6. panfilero

    panfilero Guest

    Assuming it has an Active Low reset pin, could you tie its Reset to ground through a large cap and series resistor, that way when you boot up the reset pin will be held low until the cap charges up enough to decouple the reset pin from ground?
     
  7. Guest

    There is no reset pin I am aware of, the SR Latch is constructed from two NOR gates on a quad input NOR gate IC.
    If the latch was fully embedded into a IC instead of constructed from two NOR gates.. not sure I understand how the reset works in that case. Do you know of a chip that has that functionality? Just so I can see it and try to figure out how that relates to what was previously brought up.

    -E
     
  8. amdx

    amdx Guest

    On 8/
    Study figure 2.

    http://tinyurl.com/mad4akp

    What happens when you have this waveform on one input?

    This is simple and will work for most power up conditions,
    BUT not all.
     
  9. Guest

    Here is a pic of the circuit as it stands, I added the capacitor in and it has stopped the green LED from starting in a indeterminate state(Sometimes on sometimes off). That is only if the Trip Input is open of course.
    And the 100 uF cap on the power has been removed.

    http://img33.imageshack.us/img33/8556/jxky.png

    - E
     
  10. Guest

    Thanks, but not sure I quite follow. Trying to relate your design with the overall design on the logic diagram.

    Intention is that:
    1) On power up neither relay is on
    2) On momentary reset relay /w green is activated
    3) If at any time trip is closed, green side is off, red is on
    4) If reset is hit while trip is still open, nothing happens
    5) if trip is open then reset will function and be able to trigger green led
    6) At no time will both red and green be active
    7) On init neither LED circuit is on

    The overall circuit is not a SR Latch, it has a few required tweaks to follow the above rules.

    Or were you just replacing one of the SR latches ?
     
  11. panfilero

    panfilero Guest

    The SR latch has 2 inputs S = Set and R = Reset. You can make it out of two NOR gates or two NAND gates, if you make it out of NOR gates then youmust hold your reset pin high until your chip boots up, if you make it outof NAND gates you hold your reset low until your chip boots up. Holding the reset pin in this way until your chip powers up could help you always boot up into the same state.
     
  12. Guest

    Had link to a pic of what I currently have, and the capacitor change. It must have been missed though.
    Here is the link to the current logic I am working with on a bread board.

    http://img33.imageshack.us/img33/8556/jxky.png
     
  13. Guest

    I used a capacitor to slow down one of the paths returning from one nor gate to the input on the other.
    Would one use a delayed transistor to hold the reset pin on the latch to achieve what you are mentioning?
     
  14. Guest

    That's ridiculous. The gates don't come close to satisfying:
    "Intention is that:
    1) On power up neither relay is on
    2) On momentary reset relay /w green is activated
    3) If at any time trip is closed, green side is off, red is on
    4) If reset is hit while trip is still open, nothing happens
    5) if trip is open then reset will function and be able to trigger green led
    6) At no time will both red and green be active
    7) On init neither LED circuit is on "

    The most basic logic is wrong. Maybe think about a less challenging project.
     
  15. Guest

    Perhaps something is lost in translation. As I have it placed out on a bread board and it is functioning as required. The only change I had to make was the capacitor which as far as I could tell set the initial state of the SR Latch to avoid the race condition.
     
  16. A 1.8UF capacitor on the output of a CMOS gate is not healthy. If will draw a lot of current durring switching

    Make the reset circuit on the input side with a POR as suggested

    Cheers

    Klaus
     
  17. Guest

    "Intention is that:
    1) On power up neither relay is on
    2) On momentary reset relay /w green is activated
    3) If at any time trip is closed, green side is off, red is on
    4) If reset is hit while trip is still open, nothing happens
    5) if trip is open then reset will function and be able to trigger green led
    6) At no time will both red and green be active
    7) On init neither LED circuit is on "

    The only reliable way to initialize is with a POR circuit, any other methodis mere wish.
    Based on your description of the logic and adding features such as POR, hazard-free non-oscillatory state switching, and eliminating the very real possibility of hanging in unwanted states due to the asynchronous switch inputs, you end up with the something like shown below. Seems to use quite a lotof real estate for so little functionality, 4x 4001, could have made a boo-boo, but it's not my project so not going to check it out to the max.

    Please view in a fixed-width font such as Courier.

    ..
    .. SYSTEM FLOWCHART
    ..
    .. --------
    .. | INIT | --------
    .. | STATE | |RED=1 |
    .. | RED=0 |<------------------- <--|GREEN=1 |
    .. | GREEN=0| | | |
    .. -------- | --------
    .. | | ERROR
    .. ----- | STATE
    .. 1 / \ 0 |
    .. -----<--| TRIP |-->-------- |
    .. | \ / | |
    .. | ----- | |
    .. -------- ----- |
    .. |RED=1 | / \ 0 |
    .. --->|GREEN=0 |<---- | RST |-->
    .. | | | | \ /
    .. | -------- | -----
    .. | | | |
    .. | | | v 1
    .. | | | |
    .. | ----- | --------
    .. | 0 / \ 1 | |RED=0 |
    .. ---|/TRIP*RST|-->--|--------------->|GREEN=1 |<---
    .. \ / | | | |
    .. ----- | -------- |
    .. | | |
    .. | | |
    .. | ----- |
    .. | 1 / \ 0 |
    .. '------------<--| TRIP |--->
    .. \ /
    .. -----
    ..
    .. RED == state where red LED and corresponding rly ON
    .. GREEN== same except green LED etc
    ..
    .. RED and GREEN become latches.
    ..
    ..
    .. Make State Transition Table for System Flowchart
    ..
    ..
    .. \ GREEN
    .. RED \ 0 1
    .. ----------------------------------------------
    .. | | |
    .. |RED 0->1 |RED 0->1 |
    .. 0 |on TRIP |on TRIP |
    .. | | |
    .. |GREEN 0->1 |GREEN 1->0 |
    .. |on /TRIP*RST |on TRIP |
    .. | | |
    .. |-----------------------|----------------------|
    .. |RED 1->0 | RED 1->0 |
    .. |on /TRIP*RST | no condition |
    .. 1 | | |
    .. |GREEN 0->1 | GREEN 1->0 |
    .. |on /TRIP*RST | no condition |
    .. | | |
    .. ----------------------------------------------
    ..
    .. SR-latch
    ..
    .. ------
    .. -|S Q|-
    .. | |
    .. | |
    .. -|R /Q|-
    .. ------
    ..
    ..
    .. Latch Transition Table X= don't care
    ..
    ..
    .. Q -> Q' | S | R
    .. | |
    .. -----------|----|----
    .. 0 0 | 0 | X
    .. -----------|----|----
    .. 0 1 | 1 | 0
    .. -----------|----|----
    .. 1 0 | 0 | 1
    .. -----------|----|----
    .. 1 1 | X | 0
    .. -----------|----|----
    ..
    ..
    ..
    .. Then substitute RED and GREEN S R inputs into
    ..
    .. State Transition Table of System Using NOR-Latch
    ..
    .. Transition Table
    ..
    ..
    ..
    .. RED LATCH Inputs
    ..
    .. \ GREEN
    .. RED \ 0 1
    .. -----------------------------------------------
    .. |RED 0->1 |RED 0->1 |
    .. |on TRIP |on TRIP |
    .. 0 | | |
    .. |RED_S=TRIP |RED_S=TRIP |
    .. |RED_R=0 |RED_R=0 |
    .. | | |
    .. | | |
    .. |-------------------------|----------------------|
    .. |RED 1->0 | RED 1->0 |
    .. |on /TRIP*RST | no condition |
    .. 1 | | |
    .. |RED_S=0 | RED_S=0 |
    .. |RED_R=/TRIP*RST | RED_R=1 |
    .. | | |
    .. ------------------------------------------------
    ..
    ..
    .. then equations can be solved by inspection:
    ..
    .. RED_S=TRIP*/RED
    ..
    .. RED_R=/TRIP*RST*RED + GREEN*RED
    ..
    ..
    .. GREEN Latch Inputs
    ..
    .. \ GREEN
    .. RED \ 0 1
    .. ----------------------------------------------
    .. | | |
    .. |GREEN 0->1 |GREEN 1->0 |
    .. 0 |on /TRIP*RST |on TRIP |
    .. | | |
    .. |GREEN_S=/TRIP*RST |GREEN_S=0 |
    .. |GREEN_R=0 |GREEN_R=TRIP |
    .. | | |
    .. |-----------------------|----------------------|
    .. |GREEN 0->1 | GREEN 1->0 |
    .. |on /TRIP*RST | no condition |
    .. 1 | | |
    .. |GREEN_S=/TRIP*RST | GREEN_S=0 |
    .. |GREEN_R=0 | GREEN_R=1 |
    .. | | |
    .. ----------------------------------------------
    ..
    .. GREEN_S=/TRIP*RST*/GREEN
    ..
    .. GREEN_R=TRIP *GREEN + RED*GREEN
    ..
    ..
    ..
    ..
    .. Final task is to create SR-latch with means to force
    .. latch into 01 state upon application of combina-
    .. torial INIT input.
    ..
    ..
    ..
    .. SR-latch
    ..
    .. -------
    .. ----|S Q|-
    .. | |
    .. | |
    .. ----|R I /Q|-
    .. -------
    .. |
    .. INIT-----'
    ..
    ..
    ..
    ..
    ..
    .. ---------------------------------------------------
    .. | ___ |
    .. S |--------\ \ |
    .. | | o-- |
    .. | --/___/ | |
    .. | | | ___ ___ |
    .. | | --\ \ ,-\ \ |
    .. | | | o---| | o--+------------|/Q
    .. INIT |-----|-------------/___/ '-/___/ | |
    .. | | | |
    .. | | | ___ |
    .. | | ---\ \ |
    .. | | | o-+-| Q
    .. R |-----|------------------------------------/___/ | |
    .. | | | |
    .. | | | |
    .. | '-------------------------------------------' |
    .. ---------------------------------------------------
    ..
    ..
    ..
    ..
    ..
    ..
    .. Then instantiate logic with real parts:
    ..
    ..
    ..
    ..
    ..
    .. INPUT SWITCH LOGIC
    ..
    ..
    .. VDD RST MOM
    .. | SW
    .. TRIP o |
    .. SW / ---
    .. o ,------o o--+-----------> /TRIP*RST
    .. | __ | |
    .. | ,-\ \ | |
    .. +-----| | o-+-----------|-----------> /TRIP
    .. | '-/___/ |
    .. | |
    .. | |
    .. +--------------------------|-----------> TRIP
    .. | |
    .. [10K] [10K]
    .. | |
    .. --- ---
    .. com com
    ..
    ..
    ..
    ..
    .. SR-Latch Logic
    ..
    ..
    .. ,------+--------------------,
    .. | | |
    .. | | |
    .. | | ___ GREEN |
    .. __ | -\ \ ------- |
    .. ,-\ \ | | o-|S Q|---+--[4.7K]-->to
    .. /TRIP*RST----| | o--|--------/___/ | | GREEN
    .. '-/___/ | | | relay
    .. | ___ | | drvr
    .. TRIP------------------|-\ \ ___ | |
    .. | | o-\ \ | |
    .. ---|-/___/ | o-|R I /Q|---,
    .. | | -/___/ ------- |
    .. | | | | |
    .. | | | | |
    .. | | | | |
    .. | | '------------|-------'
    .. INIT | | |
    .. from >-------------|---|-------------------+
    .. POR | | |
    .. | | ,------------|-------,
    .. | | | | |
    .. | | | | |
    .. | | | ___ | |
    .. | | ___ -\ \ ------- |
    .. | -\ \ | o-|R I /Q|---'
    .. | | o-/___/ | |
    .. /TRIP*RST----------|-----/___/ | |
    .. | | |
    .. | ___ | |
    .. /TRIP--------------|------------\ \ | |
    .. | | o-|S Q|---+--[4.7K]--> to
    .. | -/___/ ------- | RED
    .. | | RED | relay
    .. | | | drvr
    .. | | |
    .. '----------+--------------------'
    ..
    ..
    ..
    ..
    ..
     
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