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SPICE netlist to schematic?

C

Chaos Master

Jan 1, 1970
0
Anybody here knows any program to convert a netlist from SPICE, to a schematic
(i.e. the reverse of a netlister)?
 
K

Kevin Aylward

Jan 1, 1970
0
Chaos said:
Anybody here knows any program to convert a netlist from SPICE, to a
schematic (i.e. the reverse of a netlister)?

Amazingly difficult task. Have a think just what is involved tpo to
this?

However, http://www.concept.de/ has one. Apparently.


Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
P

Paul Burridge

Jan 1, 1970
0
Amazingly difficult task. Have a think just what is involved tpo to
this?

I find I can do this relatively easily on paper for individual stages,
but it does get increasingly difficult the more components/stages
there are.
 
C

Chaos Master

Jan 1, 1970
0
Kevin Aylward engraved with a +2 athame:
Amazingly difficult task. Have a think just what is involved tpo to
this?

However, http://www.concept.de/ has one. Apparently.

I'll try the eval version. That is, IF I manage to make that DAMNED license
manager for their program work(it just recognizes my license ID as 0).
 
K

Kevin Aylward

Jan 1, 1970
0
Paul said:
I find I can do this relatively easily on paper for individual stages,
but it does get increasingly difficult the more components/stages
there are.

Note that I was referring to having a program do this automatically, not
a brain. A program needs quite a bit of knowledge built in, e.g. to
recognise a flip-flop, transistor cascodes etc.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
T

Terry Pinnell

Jan 1, 1970
0
Kevin Aylward said:
Amazingly difficult task. Have a think just what is involved tpo to
this?

However, http://www.concept.de/ has one. Apparently.

I've never really understood why it should be so difficult. Every
part, every node and pin is identified unambiguously. The two
relatively difficult aspects presumably are:

1. Drawing the connections in an 'inteligent' fashion, minimising
cross-overs, etc.

2. Drawing 'correct' symbols, properly orientated, for the less
obvious components. (But, if that's too challenging, it would still be
very useful if all parts apart from discretes were just suitably
labeled rectangles.)
 
K

Kevin Aylward

Jan 1, 1970
0
Terry said:
I've never really understood why it should be so difficult. Every
part, every node and pin is identified unambiguously. The two
relatively difficult aspects presumably are:

Ahmm...That's because you aint really thought about it much.
1. Drawing the connections in an 'inteligent' fashion, minimising
cross-overs, etc.

Try actually having a go of outlining the software to do this. Say
you've got 1000 transistors in a text file. How do you go about
"knowing" a counter from a monostable, or from a differential amp. The
combinations are limitless. You need to generate significant pattern
recognition.


Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
T

Terry Pinnell

Jan 1, 1970
0
Kevin Aylward said:
Ahmm...That's because you aint really thought about it much.

But you have?
Try actually having a go of outlining the software to do this. Say
you've got 1000 transistors in a text file. How do you go about
"knowing" a counter from a monostable, or from a differential amp. The
combinations are limitless. You need to generate significant pattern
recognition.

Why would such a program need to tackle any of the irrelevant issues
you've raised? At the level I described, why does it need to recognise
and label the configuration of say a 555 plus a few Rs and Cs as 'a
monostable'? My assumption is that the user, studying the output,
might recognise it as such - but even that's not essential to build
it.

Presumably your next objection in support of your original
superficially-considered objection to the OP will be: 'Ahmm - Just
think about it. How could a program tell what size the components are
and where to bend the wires before soldering them?'
 
K

Kevin Aylward

Jan 1, 1970
0
Terry said:
But you have?


Why would such a program need to tackle any of the irrelevant issues
you've raised?

You don't know what your talking about. Non of what I said is
irrelevant. What exactly do you think is irrelevant? To make sense a
circuit diagram has to be in a reasonable conventional format. Do you
want me to send you a 200 transistor netlist so that you can actually
try it in real life how hard it is to make a readable schematic? How do
you knoew what block is associated with what block. e.g. suppose you
have a PLL, consisting of a 100 transistor digital phase/frequency
detector, a 50 transistor VCO, a 50 transistor charge pump etc...How do
you think a program is going to automatically assemble all of this into
standard cong=figurations.
At the level I described, why does it need to recognise
and label the configuration of say a 555 plus a few Rs and Cs as 'a
monostable'?

You out to lunch. Sure, an ittsy bittsy 555 timer circuit may well be
simple as a one off. You try it with a circuits that has any sort of
complexity. Its a huge task to go from a rats nest to a readable
schematic.
My assumption is that the user, studying the output,
might recognise it as such - but even that's not essential to build
it.

Presumably your next objection in support of your original
superficially

Sorry, mate, you don't seem to have a clue. This is a really difficult
problem. If it were that easy, there would be lots of them out there.
-considered objection to the OP will be: 'Ahmm - Just
think about it. How could a program tell what size the components are
and where to bend the wires before soldering them?'

Wake up dude. Go and actually try it before you make such daft cliams.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
J

Jim Thompson

Jan 1, 1970
0
Terry said:
But you have?
[snip]
Kevin Aylward
[snip the ad that Kevin should, by convention, dash-dash-space]

I have traced a few simple-minded IC's by "drawing" the (numbered)
devices into an array, the connecting them as I traced thru the metal.

I then used "rubber-banding" movements to bring some order to the
schematic.

All-in-all an enormous MANUAL task, typically taking a week...
financially viable because it was a patent infringement issue and I
was being paid "lawya" rates.

I think automating it would be worthy of a Nobel prize ;-)

...Jim Thompson
 
K

Kevin Aylward

Jan 1, 1970
0
Jim said:
Terry said:
Ahmm...That's because you aint really thought about it much.

But you have?

1. Drawing the connections in an 'inteligent' fashion, minimising
cross-overs, etc.


Try actually having a go of outlining the software to do this. Say
you've got 1000 transistors in a text file. How do you go about
"knowing" a counter from a monostable, or from a differential amp.
The combinations are limitless. You need to generate significant
pattern recognition.
[snip]
Kevin Aylward
[snip the ad that Kevin should, by convention, dash-dash-space]

I have traced a few simple-minded IC's by "drawing" the (numbered)
devices into an array, the connecting them as I traced thru the metal.

I then used "rubber-banding" movements to bring some order to the
schematic.

All-in-all an enormous MANUAL task, typically taking a week...
financially viable because it was a patent infringement issue and I
was being paid "lawya" rates.

Even just deciphering a spice .subckt can take significant effort.
I think automating it would be worthy of a Nobel prize ;-)

Indeed. It has its uses. I bet http://www.concept.de/sv_index.html is an
arm and a leg, assuming it works. I haven't tried it.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
T

Terry Pinnell

Jan 1, 1970
0
Kevin Aylward said:
You don't know what your talking about. Non of what I said is
irrelevant. What exactly do you think is irrelevant? To make sense a
circuit diagram has to be in a reasonable conventional format. Do you
want me to send you a 200 transistor netlist so that you can actually
try it in real life how hard it is to make a readable schematic? How do
you knoew what block is associated with what block. e.g. suppose you
have a PLL, consisting of a 100 transistor digital phase/frequency
detector, a 50 transistor VCO, a 50 transistor charge pump etc...How do
you think a program is going to automatically assemble all of this into
standard cong=figurations.


You out to lunch. Sure, an ittsy bittsy 555 timer circuit may well be
simple as a one off. You try it with a circuits that has any sort of
complexity. Its a huge task to go from a rats nest to a readable
schematic.


Sorry, mate, you don't seem to have a clue. This is a really difficult
problem. If it were that easy, there would be lots of them out there.


Wake up dude. Go and actually try it before you make such daft cliams.

OK, it's plain that we're respectively talking about circuits at
different ends of the complexity spectrum. Maybe ChaosMaster is
working with designs on the scale you describe. I assumed we were
closer to *my* end of the scale.

FWIW I *have* tried it. Manually it's a chore, but I made useful
inroads. I expect the data processing necessary would increase at a
combinatorial rate. But nevertheless, given today's CPU speeds, IMO a
reasonably efficient program could break the back of what *I* would
regard as a fair size circuit.
 
K

Kevin Aylward

Jan 1, 1970
0
Terry said:
OK, it's plain that we're respectively talking about circuits at
different ends of the complexity spectrum. Maybe ChaosMaster is
working with designs on the scale you describe. I assumed we were
closer to *my* end of the scale.

FWIW I *have* tried it. Manually it's a chore, but I made useful
inroads. I expect the data processing necessary would increase at a
combinatorial rate. But nevertheless, given today's CPU speeds, IMO a
reasonably efficient program could break the back of what *I* would
regard as a fair size circuit.


I am not even addressing the processing data rate. I don't think that
that is a big issue at all. I am only really addressing the *difficulty*
in actual *writing* the program, not its execution. The conscious mind
is an amazing thing, and we often forget or ignore just what it is
doing. When we look at a circuit, our brain generates an all in the oner
picture of what's going on. A program needs a good bit of intelligence
to "know" how a set of connections should look physically to reverse
enginerer a schematic.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
C

Charles Edmondson

Jan 1, 1970
0
Jim said:
Terry Pinnell wrote:

Ahmm...That's because you aint really thought about it much.


But you have?



1. Drawing the connections in an 'inteligent' fashion, minimising
cross-overs, etc.



Try actually having a go of outlining the software to do this. Say
you've got 1000 transistors in a text file. How do you go about
"knowing" a counter from a monostable, or from a differential amp.
The combinations are limitless. You need to generate significant
pattern recognition.
[snip]


Kevin Aylward
[snip the ad that Kevin should, by convention, dash-dash-space]

I have traced a few simple-minded IC's by "drawing" the (numbered)
devices into an array, the connecting them as I traced thru the metal.

I then used "rubber-banding" movements to bring some order to the
schematic.

All-in-all an enormous MANUAL task, typically taking a week...
financially viable because it was a patent infringement issue and I
was being paid "lawya" rates.

I think automating it would be worthy of a Nobel prize ;-)

...Jim Thompson

Hi Jim,
I usually describe this as the same order of complexity of creating a
PCB from a netlist, including auto-placement and auto-routing, without
the extra degrees of freedom of a multi-layer board. It isn't a simple
task just to lay it out and wire everything together, much less make it
understandable like Kevin is talking about.

And everyone knows that, even with the state of the art in PCB layout,
they still don't have a reliable auto-place, auto-route combination, and
there is a lot more money available for research on PCB layout than in
laying out a netlist on a schematic!

Charlie
Edmondson Engineering
Unique Solutions to Unusual Problems
 
A

Active8

Jan 1, 1970
0
Amazingly difficult task. Have a think just what is involved tpo to
this?

However, http://www.concept.de/ has one. Apparently.

interesting. in case you didn't see it and didn't know about it, you'll
find links at the bottom of their pages to help you with your web design
projects. they're html/css/browser validators.

brs,
mike
 
A

Active8

Jan 1, 1970
0
I've never really understood why it should be so difficult. Every
part, every node and pin is identified unambiguously. The two
relatively difficult aspects presumably are:

in case you didn't see it and didn't know about it, you'll
find links at the bottom of their pages to help you with your web design
projects. they're html/css/browser validators.

brs,
mike
 
C

Chaos Master

Jan 1, 1970
0
Paul Camilleri engraved with a +2 athame:

BTW, Electronics Workbench 5.1.2 had a function for drawing a schematic from a
netlist. While it had various flaws(e.g. wrong connections on subcircuits), it
worked OK for circuits with transistors and resistors. I wonder if this function
is avaliable on Multisim?
 
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