Maker Pro
Maker Pro

SPICE model for PVI1050N

C

Christian HOSTELET

Jan 1, 1970
0
Hello,

I'm desperately looking for a SPICE model of the photovoltaic
isolator PVI-1050N from International Rectifier. I asked their
support desk but got a negative answer. Has anyone built such a
model? Or is it possible to build one using the information given
in the datasheet?

Thanks
 
K

Ken Smith

Jan 1, 1970
0
Hello,

I'm desperately looking for a SPICE model of the photovoltaic
isolator PVI-1050N from International Rectifier. I asked their
support desk but got a negative answer. Has anyone built such a
model? Or is it possible to build one using the information given
in the datasheet?

Making your own model shouldn't be too hard.

The input side is an LED. I doubt you need to model any AC parameters on
that side. Just get the drops right.

The output side is a stack of photo diodes. You get a current equal to
about 1/1000 of the LEDs current out. There is a large diode leakage
current and capacitance in parallel with this. You may be able to get
away with just the output current and leakage. The capacitance of the
MOS-FET you hook it too is sure to be the controlling effect.
 
C

Christian HOSTELET

Jan 1, 1970
0
[email protected] (Ken Smith) écrivait
Making your own model shouldn't be too hard.

The input side is an LED. I doubt you need to model any AC parameters
on that side. Just get the drops right.

The output side is a stack of photo diodes. You get a current equal
to about 1/1000 of the LEDs current out. There is a large diode
leakage current and capacitance in parallel with this. You may be
able to get away with just the output current and leakage. The
capacitance of the MOS-FET you hook it too is sure to be the
controlling effect.

Ken,

Thanks for your reply, but I'm still a newbie on Spice.

OK for the input side (LED) it seemed relatively straightforward.
Same for the isolation resistance and capacitance.

I'm less confortable with the photodiodes stack.
In the datasheet there is a Voutput=f(Iinput, Rload) diagram which is
rather clear, but I'm having difficulties to translate that to the
appropriate current source(s) and/or voltage source(s) controlled by
the load and LED currents.
Maybe I'm too much looking for perfection.
Anyway, I want to study the transient aspects in using this component
with a pair of MOSFET (bi-directional switch) and don't want to
overlook some important characteristics in the modelling.

Any help appreciated
 
K

Ken Smith

Jan 1, 1970
0
[email protected] (Ken Smith) écrivait
[...]
The output side is a stack of photo diodes. You get a current equal
to about 1/1000 of the LEDs current out. There is a large diode
leakage current and capacitance in parallel with this. You may be
able to get away with just the output current and leakage. The
capacitance of the MOS-FET you hook it too is sure to be the
controlling effect.

Ken,
[...]
I'm less confortable with the photodiodes stack.
In the datasheet there is a Voutput=f(Iinput, Rload) diagram which is
rather clear, but I'm having difficulties to translate that to the
appropriate current source(s) and/or voltage source(s) controlled by
the load and LED currents.
Maybe I'm too much looking for perfection.

Could be you are going for needless perfection.

I haven't got the data sheet in front of me but I suspect that the easiest
way to develop the model is to:

(1)
Make a current controled current source that will give you the right short
circuit currents. To do this you put a voltage source (perhaps set to
zero) in series with the LED to measure the current. You then code it
like this:

F1 OutputNode1 OutputNode2 VcurrentSense Gain

or

F1 OutputNode1 OutputNode2 VcurrentSense TBL(0 0 in out in out .. etc)

Where "in" and "out" are the currents on the LED and the output side.


(2)
Make a voltage controlled current source to load the output of the current
source to get the open circuit voltage right. This will be a "G" element.
You could also try just loading the output with a string of 1N914s. I
guess about 18 of them.

(3)
Plot the results and dream up something to get the difference between what
the model does and the part does and tack it in. I don't think this will
even be needed.
 
K

Kevin Aylward

Jan 1, 1970
0
Ken said:
[email protected] (Ken Smith) écrivait
[...]
The output side is a stack of photo diodes. You get a current equal
to about 1/1000 of the LEDs current out. There is a large diode
leakage current and capacitance in parallel with this. You may be
able to get away with just the output current and leakage. The
capacitance of the MOS-FET you hook it too is sure to be the
controlling effect.

Ken,
[...]
I'm less confortable with the photodiodes stack.
In the datasheet there is a Voutput=f(Iinput, Rload) diagram which
is rather clear, but I'm having difficulties to translate that to
the appropriate current source(s) and/or voltage source(s)
controlled by the load and LED currents.
Maybe I'm too much looking for perfection.

Could be you are going for needless perfection.

I haven't got the data sheet in front of me but I suspect that the
easiest way to develop the model is to:

(1)
Make a current controled current source that will give you the right
short circuit currents. To do this you put a voltage source (perhaps
set to zero) in series with the LED to measure the current. You then
code it like this:

F1 OutputNode1 OutputNode2 VcurrentSense Gain

or

F1 OutputNode1 OutputNode2 VcurrentSense TBL(0 0 in out in out .. etc)

Where "in" and "out" are the currents on the LED and the output side.


(2)
Make a voltage controlled current source to load the output of the
current source to get the open circuit voltage right.

A resistor is simpler:)
This will be a
"G" element. You could also try just loading the output with a string
of 1N914s. I guess about 18 of them.

(3)
Plot the results and dream up something to get the difference between
what the model does and the part does and tack it in. I don't think
this will even be needed.

Ahmmmm...famous last words...

I have had a little play with this. I had a look at the graphs. They
show an output graph something like the output characteristis of a
transister, but Vce being replaced by the input current. This implies
some sort of limiting. However, into a s/c the current follows the input
with a scale factor, requiring limiting to be removed.

What I have done here, is use an iout=i/(i+K) to form a limiter, but
multiplyed K by the output voltage such that as V goes to zero the
limiting goes away.

The graphs are roughly of the right shape with different loads (1M to
10M to open and under s/c conditions, but I have not tweaked them yet.

Preliminary idea PVI15080N:
*************
..subckt PVI anode cathode out_plus out_neg
*
*copyright kevin aylward, www.anasoft.co.uk.
*this model can be freely used provide this notice is included
d1 anode sense1 dmod1
vsense sense1 cathode 0
biout out_plus out_neg i = -0.001 * i(vsense)/(1 + 80 * i(vsense) *
v(out_plus, out_neg))
rout out_plus out_neg 5Meg
dout out_neg out_plus dmod2
..MODEL dmod1 d(rs=10 cjo=2p is=100p N=2.5 bv=7)
..MODEL dmod2 d(rs=10 cjo=2p is=100p N=1 bv=30)
..ends PVI
**********

I have ignored the output string of diodes for now. I have only spent a
little while on it, so there may be a better way or more accurate way.
The "80" and "5Meg" need to be twiddled to get the best match.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
C

Christian HOSTELET

Jan 1, 1970
0
"Kevin Aylward" <[email protected]> écrivait

[snip]
I have had a little play with this. I had a look at the graphs. They
show an output graph something like the output characteristis of a
transister, but Vce being replaced by the input current. This implies
some sort of limiting. However, into a s/c the current follows the
input with a scale factor, requiring limiting to be removed.

What I have done here, is use an iout=i/(i+K) to form a limiter, but
multiplyed K by the output voltage such that as V goes to zero the
limiting goes away.

The graphs are roughly of the right shape with different loads (1M to
10M to open and under s/c conditions, but I have not tweaked them yet.

Preliminary idea PVI15080N:
*************
.subckt PVI anode cathode out_plus out_neg
*
*copyright kevin aylward, www.anasoft.co.uk.
*this model can be freely used provide this notice is included
d1 anode sense1 dmod1
vsense sense1 cathode 0
biout out_plus out_neg i = -0.001 * i(vsense)/(1 + 80 * i(vsense) *
v(out_plus, out_neg))
rout out_plus out_neg 5Meg
dout out_neg out_plus dmod2
.MODEL dmod1 d(rs=10 cjo=2p is=100p N=2.5 bv=7)
.MODEL dmod2 d(rs=10 cjo=2p is=100p N=1 bv=30)
.ends PVI
**********

I have ignored the output string of diodes for now. I have only spent
a little while on it, so there may be a better way or more accurate
way. The "80" and "5Meg" need to be twiddled to get the best match.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

Looks great !

I'll play with it, especially the B function.
For Rout, it seems to be a linear function (or inverse of) of the input
current i(Vsense). I'll look at that.
 
K

Kevin Aylward

Jan 1, 1970
0
Christian said:
"Kevin Aylward" <[email protected]> écrivait

[snip]
I have had a little play with this. I had a look at the graphs. They
show an output graph something like the output characteristis of a
transister, but Vce being replaced by the input current. This implies
some sort of limiting. However, into a s/c the current follows the
input with a scale factor, requiring limiting to be removed.

What I have done here, is use an iout=i/(i+K) to form a limiter, but
multiplyed K by the output voltage such that as V goes to zero the
limiting goes away.

The graphs are roughly of the right shape with different loads (1M to
10M to open and under s/c conditions, but I have not tweaked them
yet.

Preliminary idea PVI15080N:
*************
.subckt PVI anode cathode out_plus out_neg
*
*copyright kevin aylward, www.anasoft.co.uk.
*this model can be freely used provide this notice is included
d1 anode sense1 dmod1
vsense sense1 cathode 0
biout out_plus out_neg i = -0.001 * i(vsense)/(1 + 80 * i(vsense) *
v(out_plus, out_neg))
rout out_plus out_neg 5Meg
dout out_neg out_plus dmod2
.MODEL dmod1 d(rs=10 cjo=2p is=100p N=2.5 bv=7)
.MODEL dmod2 d(rs=10 cjo=2p is=100p N=1 bv=30)
.ends PVI
**********

I have ignored the output string of diodes for now. I have only spent
a little while on it, so there may be a better way or more accurate
way. The "80" and "5Meg" need to be twiddled to get the best match.

Looks great !

I'll play with it, especially the B function.
For Rout, it seems to be a linear function (or inverse of) of the
input current i(Vsense). I'll look at that.

Well, I just used a fixed resistor. The basic vout verses Iin shapes are
ok as the load resister changes. Do a DC sweep of 0 to 20ma, then param
step the load from 2M to 10 meg. The equation wants a bit more of a
tweak to get a better fit though.

The turn off response really needs an additional term. The data sheet
shows a turn off speed independent of load resister. Not sure why this
should occur. I havent looked at the physics of these things yet.

I tweeked the diodes a bit as as well

..MODEL dmod1 d(rs=10 cjo=10p tt=1n is=10u N=6 bv=7)

..MODEL dmod2 d(rs=10 cjo=10p is=1u N=1 bv=15)

To get a better match on typical leakage, but this data is guestimated
as well.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
C

Christian HOSTELET

Jan 1, 1970
0
Christian said:
"Kevin Aylward" <[email protected]> écrivait

[snip]
I have had a little play with this. I had a look at the graphs. They
show an output graph something like the output characteristis of a
transister, but Vce being replaced by the input current. This
implies some sort of limiting. However, into a s/c the current
follows the input with a scale factor, requiring limiting to be
removed.

What I have done here, is use an iout=i/(i+K) to form a limiter, but
multiplyed K by the output voltage such that as V goes to zero the
limiting goes away.

The graphs are roughly of the right shape with different loads (1M
to 10M to open and under s/c conditions, but I have not tweaked them
yet.

Preliminary idea PVI15080N:
*************
.subckt PVI anode cathode out_plus out_neg
*
*copyright kevin aylward, www.anasoft.co.uk.
*this model can be freely used provide this notice is included
d1 anode sense1 dmod1
vsense sense1 cathode 0
biout out_plus out_neg i = -0.001 * i(vsense)/(1 + 80 * i(vsense) *
v(out_plus, out_neg))
rout out_plus out_neg 5Meg
dout out_neg out_plus dmod2
.MODEL dmod1 d(rs=10 cjo=2p is=100p N=2.5 bv=7)
.MODEL dmod2 d(rs=10 cjo=2p is=100p N=1 bv=30)
.ends PVI
**********

I have ignored the output string of diodes for now. I have only
spent a little while on it, so there may be a better way or more
accurate way. The "80" and "5Meg" need to be twiddled to get the
best match.

Looks great !

I'll play with it, especially the B function.
For Rout, it seems to be a linear function (or inverse of) of the
input current i(Vsense). I'll look at that.

Well, I just used a fixed resistor. The basic vout verses Iin shapes
are ok as the load resister changes. Do a DC sweep of 0 to 20ma, then
param step the load from 2M to 10 meg. The equation wants a bit more
of a tweak to get a better fit though.

The turn off response really needs an additional term. The data sheet
shows a turn off speed independent of load resister. Not sure why this
should occur. I havent looked at the physics of these things yet.

I tweeked the diodes a bit as as well

.MODEL dmod1 d(rs=10 cjo=10p tt=1n is=10u N=6 bv=7)

.MODEL dmod2 d(rs=10 cjo=10p is=1u N=1 bv=15)

To get a better match on typical leakage, but this data is guestimated
as well.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

Kevin,

(NB: My "referential" is IR's datasheet N° PD10054-B)

I tried with your new diodes models (dmod's), but it seems to be
incorrect (output voltage divided by 2 ..?). Keeping your former diodes
models, and adjusting Rout to 5.4Meg and i(vsense) coefficient to 0.0008
(instead of 0.001), I got very correct results for VDC = f(Input
Current) (ref. Fig.1 in datasheet)

I've stepped using 0, 1MEG, 2.2MEG, 4.7MEG, 10MEG and "infinite" Rload
with Input Current sweeping from 0 to 20mA.

I've also introduced a temperature coefficient K=1-0.009*(TEMP-27) for
the Biout current equation to take in acccount this parameter.

Now there is the time response. Couldn't find the IR's definition of it.
 
K

Kevin Aylward

Jan 1, 1970
0
Christian said:
Christian said:
"Kevin Aylward" <[email protected]> écrivait

[snip]


I have had a little play with this. I had a look at the graphs.
They show an output graph something like the output characteristis
of a transister, but Vce being replaced by the input current. This
implies some sort of limiting. However, into a s/c the current
follows the input with a scale factor, requiring limiting to be
removed.

What I have done here, is use an iout=i/(i+K) to form a limiter,
but multiplyed K by the output voltage such that as V goes to zero
the limiting goes away.

The graphs are roughly of the right shape with different loads (1M
to 10M to open and under s/c conditions, but I have not tweaked
them yet.

Preliminary idea PVI15080N:
*************
.subckt PVI anode cathode out_plus out_neg
*
*copyright kevin aylward, www.anasoft.co.uk.
*this model can be freely used provide this notice is included
d1 anode sense1 dmod1
vsense sense1 cathode 0
biout out_plus out_neg i = -0.001 * i(vsense)/(1 + 80 * i(vsense) *
v(out_plus, out_neg))
rout out_plus out_neg 5Meg
dout out_neg out_plus dmod2
.MODEL dmod1 d(rs=10 cjo=2p is=100p N=2.5 bv=7)
.MODEL dmod2 d(rs=10 cjo=2p is=100p N=1 bv=30)
.ends PVI
**********

I have ignored the output string of diodes for now. I have only
spent a little while on it, so there may be a better way or more
accurate way. The "80" and "5Meg" need to be twiddled to get the
best match.
Looks great !

I'll play with it, especially the B function.
For Rout, it seems to be a linear function (or inverse of) of the
input current i(Vsense). I'll look at that.

Well, I just used a fixed resistor. The basic vout verses Iin shapes
are ok as the load resister changes. Do a DC sweep of 0 to 20ma, then
param step the load from 2M to 10 meg. The equation wants a bit more
of a tweak to get a better fit though.

The turn off response really needs an additional term. The data sheet
shows a turn off speed independent of load resister. Not sure why
this should occur. I havent looked at the physics of these things
yet.

I tweeked the diodes a bit as as well

.MODEL dmod1 d(rs=10 cjo=10p tt=1n is=10u N=6 bv=7)

.MODEL dmod2 d(rs=10 cjo=10p is=1u N=1 bv=15)

To get a better match on typical leakage, but this data is
guestimated as well.
Kevin,

(NB: My "referential" is IR's datasheet N° PD10054-B)

I tried with your new diodes models (dmod's), but it seems to be
incorrect (output voltage divided by 2 ..?).

Strange. I suspect operator error. It works ok on my set up. Try one at
a time. dmod1 has its IS to be 1/10 of the data sheet maximum, which
meant that N had to be increased. These values are guestimated because
typical are not specified.
Keeping your former
diodes models, and adjusting Rout to 5.4Meg and i(vsense) coefficient
to 0.0008 (instead of 0.001), I got very correct results for VDC =
f(Input Current) (ref. Fig.1 in datasheet)

I picked the other model because the numbers were rounder.
I've stepped using 0, 1MEG, 2.2MEG, 4.7MEG, 10MEG and "infinite" Rload
with Input Current sweeping from 0 to 20mA.

I've also introduced a temperature coefficient K=1-0.009*(TEMP-27) for
the Biout current equation to take in acccount this parameter.

Now there is the time response. Couldn't find the IR's definition of
it.

There is a graph. It shows various torn times, with essentially a
horizontal line for turn off.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
C

Christian HOSTELET

Jan 1, 1970
0
Christian said:
"Kevin Aylward" <[email protected]> écrivait
snip]
Now there is the time response. Couldn't find the IR's definition of
it.

There is a graph. It shows various torn times, with essentially a
horizontal line for turn off.

Sorry, should have been clearer (I'm not native).

I've seen the graph but what I'm missing is the definition of Ton and
Toff. Is it 3dB, 10-90%, something else?

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

Anyway, I'll try again with the modified Dmod.
 
K

Kevin Aylward

Jan 1, 1970
0
Christian said:
Christian said:
"Kevin Aylward" <[email protected]> écrivait
snip]
Now there is the time response. Couldn't find the IR's definition of
it.

There is a graph. It shows various torn times, with essentially a
horizontal line for turn off.

Sorry, should have been clearer (I'm not native).

I've seen the graph but what I'm missing is the definition of Ton and
Toff. Is it 3dB, 10-90%, something else?

Its the 10%-90% points.


Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
 
Top