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Discussion in 'General Electronics Discussion' started by Rajinder, Aug 2, 2016.

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  1. Rajinder

    Rajinder

    437
    7
    Jan 30, 2016
    Hi All,
    I was wondering if someone could help me. I have a requirement to detect different sound patterns that drive a piezo buzzer. The sound patterns differ for different types of alarm. This is an automated system which h can be left running and then it keeps a record of alarms that have taken place.
    A typical pattern for alarm would be a short burst of pulses approx 3kHz for around 10ms and then no pattern for 1second then a repeat of 10 ms burst.
    The 10ms is roughly around 30pulses St 30khz.
    Is there any way I can convert these pulses into one pulse, rather than try and measure each rising edge. Then I could simply measure the mark to space ratio of each different alarm sound pattern. Perhaps using capture method of microcontroller.
    Alternatively could I use a MIC to pick up the noise filter at slightly above 3kHz and then apply gain? Not sure about this method.
    Has anyone got any different ideas?
    Best regards,
    Raj
     
  2. Alec_t

    Alec_t

    2,892
    776
    Jul 7, 2015
    A retriggerable monostable could be used to replace the 10mS burst with a single pulse.
    You've described one sound pattern. What are the others like, that you have to distinguish?
     
  3. Rajinder

    Rajinder

    437
    7
    Jan 30, 2016
    Hi, thanks for your input

    The other sound pattern is again 10ms short pulse at 3khz and then 10 sec delay of no pulses then back to 10ms pulse.

    The other pattern is 3 consecutive pulses of 10ms with a delay of 200ms in between.

    Please could you show me what you mean by retrievable monostable. Not sure.
    Thanks in advance.

    What if I used a MIC, bandpass filter and then time detector to microcontroller input, would that work?
    Best regards,
    Raj
     
  4. Sunnysky

    Sunnysky

    480
    121
    Jul 15, 2016
    MIC>>OP Amp high Q(~40) BPF (tuned to piezo f)>>active peak detector> OP Amp comparator with hysteresis> logic level out to CPU
     
  5. Alec_t

    Alec_t

    2,892
    776
    Jul 7, 2015
    It's retriggerable, not retrievable :).
    Here are two monostable options. The first is the retriggerable one :-
    N-to-1-pulser.JPG
     
  6. Rajinder

    Rajinder

    437
    7
    Jan 30, 2016
    Hi,
    Many thanks for your help. Please could you explain how this works.
    Also is the slight overshoot of the pulse a characteristic of this circuit I.e. after the train of pulses has completed there is s delay before the pulse falls to 0V.
    What happens if the input was a flat line?
    Best regards,
    Raj
    PS thankyou for taking the time to help
     
  7. Sunnysky

    Sunnysky

    480
    121
    Jul 15, 2016
    Rajinder, we dont know if there is other audio interference ( music) so the detection can be simple or complex to identify the tone and then the code.

    only 2 codes? using 10ms burst

    a) 3 bursts 200ms gap then repeat after 1 sec
    2) 1 burst and repeat every sec

    Will there be more?

    What are your skills, hardware or software? Do you have help?

    Retriggerable
    vs Non-Retriggerable which means once triggered, it disables input (with gate) until RC delay
    Both are "monostable"

    A design can be made as precise or as loose as you define it.
    It can detect exact sequence and ignore all else

    or accept anything say >100ms but < 300ms delay to next burst as Code "1"
    and anything >300ms but < 2 seconds as Code "2"

    It is up to you to define accuracy which may imply complexity or simplicity.
     
    Last edited: Aug 3, 2016
  8. Rajinder

    Rajinder

    437
    7
    Jan 30, 2016
    Hi, I need it to accurate, at least to distinguish alarm patterns as mentioned previously. I like the idea of the retriggable monostable. But if I use this what happens when there is no pulse I.e. space
    Skills are a mixture although not do good with hardware side of things.
    Last sequence is 10ms every 40 secs
    Can you help develop this idea?
    Best regards,
    Raj
     
  9. Alec_t

    Alec_t

    2,892
    776
    Jul 7, 2015
    U1 consists of 6 Schmitt trigger inverters (only 2 are used here, the inputs of the others would need to be grounded). When IN goes high, U1a output goes low and C1 discharges, so U1b output goes high. When IN goes low, U1a output goes high but can't recharge C1 because of D1. C1 then recharges via R1. The time constant R1C1 is chosen such that C1's voltage can't reach the upper threshold voltage of U1b before IN goes high again. So U1b output remains high provided repetitive pulses arrive at IN. When these cease, C1 is no longer discharged so U1b input reaches the threshold and U1b output goes low. This final charge period is why the Out1 signal ends shortly after the end of the pulse burst.
    U2a simply inverts the IN pulses. The first pulse of a burst drives U2b bottom input low, so U2b output goes high, C2 starts to charge through R2, U2c input goes high, U2c output goes low. This keeps U2b output high (even when U2b input is receiving further pulses of the burst) until C2 completes charging. The time constant R2C2 is chosen so that C2's charging time is just greater than the duration of the burst.
    If IN is a flat line then Out1 and Out2 remain at a low level.
     
  10. Rajinder

    Rajinder

    437
    7
    Jan 30, 2016
    Hi,
    Thanks for the description of the circuit, it makes sense. A quick question, do I need both circuits or just one. Do I need the monostable and retriggerable circuit or only one of them?
    Thanks
    Raj
     
  11. Alec_t

    Alec_t

    2,892
    776
    Jul 7, 2015
    Just one. Your choice.
     
  12. Rajinder

    Rajinder

    437
    7
    Jan 30, 2016
    Hi, many thanks for your help. I have one question, when the diode is forward biased, it stops the capacitor discharging. Is the discharge path through the cap to the diode and the output pin of the Schmitt trigger. Is that correct, are there any potential issues with this?
    Best regards,
    Raj
     
  13. Alec_t

    Alec_t

    2,892
    776
    Jul 7, 2015
    No. When the diode is reverse biased it stops the cap discharging.
    Yes. Since the cap is only 10nF the current won't hurt the inverter. If a much larger cap were used (say 100uF or more) a current-limiting resistor might be needed.
     
  14. Rajinder

    Rajinder

    437
    7
    Jan 30, 2016
    hi thanks for your prompt reply. Please could you explain why the 10nF will not damage the inverter. i belive that in this state it will be used as a current sink output pin, is that correct? is it due to current flowing through the 10nF will be less than say a 100uF? not sure? i did try the circuit it works! so thankyou for your help
    best regards
    Raj
     
  15. Alec_t

    Alec_t

    2,892
    776
    Jul 7, 2015
    The stored energy in the cap is not enough to heat the low-side output FET of the inverter significantly during the very brief discharge time.
    Yes.
    Good to know the circuit works for you.
     
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