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SMPS design question

M

Michael

Jan 1, 1970
0
Hi
I am in the process of bringing up 300W offline forward converter
based on UC3844. The specs are similar to the ATX power supply. The
problem I am stuck with is that the UC3844 is outputting constant duty
cycle signal (45% or so); so, the "regulation" is done by controlling
burst mode duty cycle. UC3844 pin 1 (comp) is swinging from max to min
=> PWM latch is never reset by the current sense signal=> constant
duty cycle.
I tried to estimate the transfer function after fiddling with the
compensation
(http://www.switchingpowermagazine.com/downloads/Apr 02 feature.pdf);
quick scan gave me same signal on both sides of the transformer
secondary from 100Hz to 1kHz. Very confusing, does it mean that open
loop gain is 0? It cannot be...
Any clues?
Thank you
 
G

Genome

Jan 1, 1970
0
Michael said:
Hi
I am in the process of bringing up 300W offline forward converter
based on UC3844. The specs are similar to the ATX power supply. The
problem I am stuck with is that the UC3844 is outputting constant duty
cycle signal (45% or so); so, the "regulation" is done by controlling
burst mode duty cycle. UC3844 pin 1 (comp) is swinging from max to min
=> PWM latch is never reset by the current sense signal=> constant
duty cycle.
I tried to estimate the transfer function after fiddling with the
compensation
(http://www.switchingpowermagazine.com/downloads/Apr 02 feature.pdf);
quick scan gave me same signal on both sides of the transformer
secondary from 100Hz to 1kHz. Very confusing, does it mean that open
loop gain is 0? It cannot be...
Any clues?
Thank you

Sounds like your loop is unstable.......as if you didn't know. If it hasn't
fucked its bucket during testing then you deserve a seriously severe amount
of congratulations for your layout and your current sense. That's a big
Boomshanka.

I might dribble on but it would make more sense if I dribbled over your
particular circuit. Any chance of a looksee?

DNA
 
M

Michael

Jan 1, 1970
0
Genome said:
Sounds like your loop is unstable.......as if you didn't know. If it hasn't
fucked its bucket during testing then you deserve a seriously severe amount
of congratulations for your layout and your current sense. That's a big
Boomshanka.

I might dribble on but it would make more sense if I dribbled over your
particular circuit. Any chance of a looksee?

DNA

Hi Genome
Layout… It is prototyped on the copper clad. I tried to do it the way
it's supposed to be done (usually do not have problems with it) but
it's not very compact because, as you can imagine, power components
are slightly bigger size than 0805.

The loop is probably unstable but what beats me is that loop gain
measurement (or rather estimate) shows that the gain is flat. I am
going to try to figure out what it is today (until something more
urgent comes up).

Thank a lot you for your help.

I tried to email PDF file to [email protected] but it bounced back.
My email address is [email protected] (remove
'_screwspam').
Michael
 
G

Guest

Jan 1, 1970
0
If the circuit is running 45% duty cycle the 3844 is maxed out. Are you at
the low end of startup voltage?

Also, could you give us the desired output voltage along with turns ratio?

Machone
 
Y

Yzordderex

Jan 1, 1970
0
snip

Is the current fb signal crossing the error amp before you get to max
Ton? It's the current signal which aborts the pulse I beleive. The
comp signal (which I'm fairly certain is the error amp output) jumping
rail to rail tells me the voltage loop wide open and waiting. Did you
perhaps add an rc filter to the current signal? What is response of
filter? Is it fast enough? I would also like to see schematic.

regards,
Bob
 
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