Simulating SPST and SPDT switches?

[Terry Pinnell]

I've spent a few hours over the last couple of days trying to design a
realistic and easy-to-handle simulation for break-before-make toggle
switches. But I imagine this is re-inventing the wheel, as there must
be well-established techniques. I'm using Circuitmaker, but I assume
the principles must be similar in other programs.

My approach so far (to the more complex case of a SPDT switch) has
been to use two VCSs, a triangle wave input (inverted before applying
to the 2nd VCS), and altering the respective VCS's Threshold values to
get the 'break-before-make' delay. But I expect I'm making heavy
weather of it, and would be grateful for shared techniques please.

 

[Jim Thompson]

I've spent a few hours over the last couple of days trying to design a
realistic and easy-to-handle simulation for break-before-make toggle
switches. But I imagine this is re-inventing the wheel, as there must
be well-established techniques. I'm using Circuitmaker, but I assume
the principles must be similar in other programs.

My approach so far (to the more complex case of a SPDT switch) has
been to use two VCSs, a triangle wave input (inverted before applying
to the 2nd VCS), and altering the respective VCS's Threshold values to
get the 'break-before-make' delay. But I expect I'm making heavy
weather of it, and would be grateful for shared techniques please.

That's about the only way to attack it.

...Jim Thompson

 

[Terry Pinnell]

I've spent a few hours over the last couple of days trying to design a
realistic and easy-to-handle simulation for break-before-make toggle
switches. But I imagine this is re-inventing the wheel, as there must
be well-established techniques. I'm using Circuitmaker, but I assume
the principles must be similar in other programs.

My approach so far (to the more complex case of a SPDT switch) has
been to use two VCSs, a triangle wave input (inverted before applying
to the 2nd VCS), and altering the respective VCS's Threshold values to
get the 'break-before-make' delay. But I expect I'm making heavy
weather of it, and would be grateful for shared techniques please.

As I suspected, once I started thinking straight, this turned out to
be pretty simple. For a SPDT, with about 40 ms between break and make,
I'm using this arrangement:
http://www.terrypin.dial.pipex.com/Images/SPDT-Sim.gif

Anyone have any suggested alternatives please?

 

[Terry Pinnell]

That's about the only way to attack it.

...Jim Thompson

Thanks. See also my later reply. Does that design look OK?